Datasheet

Direction
0: Input
1: Output
P1SEL.x
P1DIR.x
P1IN.x
P1IRQ.x
Module X IN
Timer0_A3
output
P1OUT.x
Interrupt
Edge Select
Q
EN
Set
P1SEL.x
P1IES.x
P1IFG.x
P1IE.x
DVSS
DVCC
P1REN.x
Pad Logic
1
1
0
0
1
1
0
Bus
Keeper
EN
P1.1/TA0_0/TA0_1
P1.2/TA1_0
P1.3/TA2_0
D
EN
MSP430F21x2
SLAS578J –NOVEMBER 2007– REVISED JANUARY 2012 www.ti.com
Port P1 Pin Schematic: P1.1 to P1.3, Input/Output With Schmitt Trigger
Table 19. Port P1 (P1.1 to P1.3) Pin Functions
CONTROL BITS / SIGNALS
PIN NAME (P1.x) x FUNCTION
P1DIR.x P1SEL.x P1SEL2.x
P1.1 (I/O) I: 0; O: 1 0 0
P1.1/TA0.0/TA1.0 1 Timer0_A3.CCI0A, Timer1_A2.CCI0A 0 1 0
Timer0_A3.TA0 1 1 0
P1.2 (I/O) I: 0; O: 1 0 0
P1.2/TA0.1 2 Timer0_A3.CCI1A 0 1 0
Timer0_A3.TA1 1 1 0
P1.3 (I/O) I: 0; O: 1 0 0
P1.3/TA0.2 3 Timer0_A3.CCI2A 0 1 0
Timer0_A3.TA2 1 1 0
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