Datasheet

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SLAS439A − SEPTEMBER 2004 − REVISED JUNE 2005
36
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Port P2 (P2.0 to P2.5) pin functions
PIN NAME (P2.X)
X
FUNCTION
CONTROL BITS / SIGNALS
PIN NAME (P2.X)
X
FUNCTION
P2DIR.x P2SEL.x CAPD.x
P2.0/ACLK/CA2 0
P2.0† (I/O) I: 0; O: 1 0 0
P2.0/ACLK/CA2
0
ACLK 1 1 0
CA2 (see Note 3) X X 1
P2.1/INCLK/CA3 1
P2.1† (I/O) I: 0; O: 1 0 0
P2.1/INCLK/CA3
1
Timer_A3.INCLK 0 1 0
DV
SS
1 1 0
CA3 (see Note 3) X X 1
P2.2/CAOUT/TA0/CA4 2
P2.2† (I/O) I: 0; O: 1 0 0
P2.2/CAOUT/TA0/CA4
2
Timer_A3.CCI0B 0 1 0
Comparator_A.OUT 1 1 0
CA4 (see Note 3) X X 1
P2.3/TA1/CA0 3
P2.3† (I/O) I: 0; O: 1 0 0
P2.3/TA1/CA0
3
Timer_A3.TA1 1 1 0
CA0 (see Note 3) X X 1
P2.4/TA2/CA1 4
P2.4† (I/O) I: 0; O: 1 0 0
P2.4/TA2/CA1
4
Timer_A3.TA2 1 1 0
CA1 (see Note 3) X X 1
P2.5/CA5 5
P2.5† (I/O) I: 0; O: 1 0 0
P2.5/CA5
5
CA5 (see Note 3) X X 1
Default after reset (PUC/POR)
NOTES: 1. N/A: Not available or not applicable.
2. X: Don’t care.
3. Setting the CAPD.x bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. Selecting the CAx input pin to the comparator multiplexer with the P2CAx bits automatically disables the input buffer
for that pin, regardless of the state of the associated CAPD.x bit.