Datasheet

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SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
61
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Port P1 (P1.5) pin schematics, MSP430x20x2
Bus
Keeper
EN
Direction
0: Input
1: Output
1
0
P1DIR.5
P1IN.5
P1IRQ.5
D
EN
Module X IN
1
0
Module X OUT
P1OUT.5
Interrupt
Edge
Select
Q
EN
Set
P1SEL.5
P1IES.5
P1IFG.5
P1IE.5
P1.5/TA0/SCLK/A5/TMS
1
0
DVSS
DVCC
P1REN.5
P1SEL.5
USIPE5
USI Module Direction
1
To JTAG
From JTAG
ADC10AE.5
Pad Logic
INCHx = 5
A5