Datasheet

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  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
52
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Port P1 (P1.4 to P1.6) pin schematics, MSP430x20x1
Bus
Keeper
EN
Direction
0: Input
1: Output
P1SEL.x
1
0
P1DIR.x
P1IN.x
P1IRQ.x
D
EN
Module X IN
1
0
Module X OUT
P1OUT.x
Interrupt
Edge
Select
Q
EN
Set
P1SEL.x
P1IES.x
P1IFG.x
P1IE.x
P1.4/SMCLK/CA4/TCK
P1.5/TA0/CA5/TMS
P1.6/TA1/CA6/TDI
1
0
DVSS
DVCC
P1REN.x
To JTAG
From JTAG
1
CAPD.x
Pad Logic
From Comparator_A+
To Comparator_A+
Control signal “From Comparator_A+”
PIN NAME
FUNCTION
SIGNAL “FROM COMPARATOR_A+” = 1
PIN NAME
FUNCTION
P2CA3 P2CA2 P2CA1
P1.4/SMCLK/CA4/TCK CA4 1 0 0
P1.5/TA0/CA5/TMS CA5 1 0 1
P1.6/TA1/CA6/TDI CA6 1 1 0
NOTES: 1. N/A: Not available or not applicable.