Datasheet

MSP430F20x3
MSP430F20x2
MSP430F20x1
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SLAS491I AUGUST 2005REVISED DECEMBER 2012
10-Bit ADC, External Reference (MSP430F20x2)
(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN MAX UNIT
V
eREF+
> V
eREF-
,
1.4 V
CC
SREF1 = 1, SREF0 = 0
Positive external reference input
V
eREF+
V
voltage range
(2)
V
eREF-
V
eREF+
V
CC
- 0.15 V,
1.4 3
SREF1 = 1, SREF0 = 1
(3)
Negative external reference input
V
eREF-
V
eREF+
> V
eREF-
0 1.2 V
voltage range
(4)
Differential external reference
ΔV
eREF
input voltage range V
eREF+
> V
eREF-
(5)
1.4 V
CC
V
ΔV
eREF
= V
eREF+
- V
eREF-
0 V V
eREF+
V
CC
,
±1
SREF1 = 1, SREF0 = 0
I
VeREF+
Static input current into V
eREF+
2.2 V, 3 V µA
0 V V
eREF+
V
CC
- 0.15 V 3 V,
0
SREF1 = 1, SREF0 = 1
(3)
I
VeREF-
Static input current into V
eREF-
0 V V
eREF-
V
CC
2.2 V, 3 V ±1 µA
(1) The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, C
I
, is also the
dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 10-bit accuracy.
(2) The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
(3) Under this condition, the external reference is internally buffered. The reference buffer is active and requires the reference buffer supply
current I
REFB
. The current consumption can be limited to the sample and conversion period with REBURST = 1.
(4) The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
(5) The accuracy limits the minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.
10-Bit ADC, Timing Parameters (MSP430F20x2)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
ADC10SR = 0 0.45 6.3
ADC10 input clock For specified performance of
f
ADC10CLK
2.2 V, 3 V MHz
frequency ADC10 linearity parameters
ADC10SR = 1 0.45 1.5
ADC10 built-in ADC10DIVx = 0, ADC10SSELx = 0,
f
ADC10OSC
2.2 V, 3 V 3.7 6.3 MHz
oscillator frequency f
ADC10CLK
= f
ADC10OSC
ADC10 built-in oscillator, ADC10SSELx = 0,
2.2 V, 3 V 2.06 3.51
f
ADC10CLK
= f
ADC10OSC
t
CONVERT
Conversion time µs
13 ×
f
ADC10CLK
from ACLK, MCLK or SMCLK,
ADC10DIVx ×
ADC10SSELx 0
1/f
ADC10CLK
Turn on settling time
t
ADC10ON
100 ns
of the ADC
(1)
(1) The condition is that the error in a conversion started after t
ADC10ON
is less than ±0.5 LSB. The reference and input signal are already
settled.
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