Datasheet

MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491I –AUGUST 2005–REVISED DECEMBER 2012 www.ti.com
Table 2. Terminal Functions, MSP430F20x1
TERMINAL
NO. DESCRIPTION
NAME I/O
PW, N RSA
General-purpose digital I/O pin
Timer_A, clock signal TACLK input
P1.0/TACLK/ACLK/CA0 2 1 I/O
ACLK signal output
Comparator_A+, CA0 input
General-purpose digital I/O pin
P1.1/TA0/CA1 3 2 I/O Timer_A, capture: CCI0A input, compare: Out0 output
Comparator_A+, CA1 input
General-purpose digital I/O pin
P1.2/TA1/CA2 4 3 I/O Timer_A, capture: CCI1A input, compare: Out1 output
Comparator_A+, CA2 input
General-purpose digital I/O pin
P1.3/CAOUT/CA3 5 4 I/O
Comparator_A+, output / CA3 input
General-purpose digital I/O pin
SMCLK signal output
P1.4/SMCLK/C4/TCK 6 5 I/O
Comparator_A+, CA4 input
JTAG test clock, input terminal for device programming and test
General-purpose digital I/O pin
Timer_A, compare: Out0 output
P1.5/TA0/CA5/TMS 7 6 I/O
Comparator_A+, CA5 input
JTAG test mode select, input terminal for device programming and test
General-purpose digital I/O pin
Timer_A, compare: Out1 output
P1.6/TA1/CA6/TDI/TCLK 8 7 I/O
Comparator_A+, CA6 input
JTAG test data input or test clock input during programming and test
General-purpose digital I/O pin
P1.7/CAOUT/CA7/TDO/TDI
(1)
9 8 I/O Comparator_A+, output / CA7 input
JTAG test data output terminal or test data input during programming and test
Input terminal of crystal oscillator
XIN/P2.6/TA1 13 12 I/O General-purpose digital I/O pin
Timer_A, compare: Out1 output
Output terminal of crystal oscillator
XOUT/P2.7 12 11 I/O
General-purpose digital I/O pin
(2)
Reset or nonmaskable interrupt input
RST/NMI/SBWTDIO 10 9 I
Spy-Bi-Wire test data input/output during programming and test
Selects test mode for JTAG pins on Port 1. The device protection fuse is
TEST/SBWTCK 11 10 I connected to TEST.
Spy-Bi-Wire test clock input during programming and test
V
CC
1 16 Supply voltage
V
SS
14 14 Ground reference
NC NA 13, 15 Not connected
QFN Pad NA Pad NA QFN package pad. Connection to VSS is recommended.
(1) TDO or TDI is selected via JTAG instruction.
(2) If XOUT/P2.7 is used as an input, excess current flows until P2SEL.7 is cleared. This is due to the oscillator output driver connection to
this pad after reset.
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