Datasheet

MSP430F15x, MSP430F16x, MSP430F161x
MIXED SIGNAL MICROCONTROLLER
SLAS368G − OCTOBER 2002 − REVISED MARCH 2011
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, power supply and input range conditions (see Note 1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AV
CC
Analog supply voltage
AV
CC
and DV
CC
are connected together
AV
SS
and DV
SS
are connected together
V
(AVSS)
= V
(DVSS)
= 0 V
2.2 3.6 V
V
(P6.x/Ax)
Analog input voltage
range (see Note 2)
All P6.0/A0 to P6.7/A7 terminals. Analog inputs
selected in ADC12MCTLx register and P6Sel.x=1
0 ≤ x ≤ 7; V
(AVSS)
≤ V
P6.x/Ax
≤ V
(AVCC)
0 V
AVCC
V
I
Operating supply current
into AV terminal
f
ADC12CLK
= 5.0 MHz
ADC12ON 1 REFON 0
2.2 V 0.65 1.3
mA
I
ADC12
into AV
CC
terminal
(see Note 3)
ADC12ON = 1, REFON = 0
SHT0=0, SHT1=0, ADC12DIV=0
3 V 0.8 1.6
mA
I
Operating supply current
it AV til
f
ADC12CLK
= 5.0 MHz
ADC12ON = 0,
REFON = 1, REF2_5V = 1
3 V 0.5 0.8 mA
I
REF+
into AV
CC
terminal
(see Note 4)
f
ADC12CLK
= 5.0 MHz
ADC12ON 0
2.2 V 0.5 0.8
mA
(see
Note
4)
ADC12ON = 0,
REFON = 1, REF2_5V = 0
3 V 0.5 0.8
mA
C
I
†
Input capacitance
Only one terminal can be selected
at one time, P6.x/Ax
2.2 V 40 pF
R
I
†
Input MUX ON resistance 0V ≤ V
Ax
≤ V
AVCC
3 V 2000 Ω
†
Not production tested, limits verified by design
NOTES: 1. The leakage current is defined in the leakage current table with P6.x/Ax parameter.
2. The analog input voltage range must be within the selected reference voltage range V
R+
to V
R−
for valid conversion results.
3. The internal reference supply current is not included in current consumption parameter I
ADC12
.
4. The internal reference current is supplied via terminal AV
CC
. Consumption is independent of the ADC12ON control bit, unless a
conversion is active. The REFON bit enables to settle the built-in reference before starting an A/D conversion.
12-bit ADC, external reference (see Note 1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
eREF+
Positive external
reference voltage input
V
eREF+
> V
REF−
/V
eREF−
(see Note 2) 1.4 V
AVCC
V
V
REF− /
V
eREF−
Negative external
reference voltage input
V
eREF+
> V
REF−
/V
eREF−
(see Note 3) 0 1.2 V
(V
eREF+
−
V
REF−/
V
eREF−
)
Differential external
reference voltage input
V
eREF+
> V
REF−
/V
eREF−
(see Note 4) 1.4 V
AVCC
V
I
VeREF+
Static input current 0V ≤V
eREF+
≤ V
AVCC
2.2 V/3 V ±1 μA
I
VREF−/VeREF−
Static input current 0V ≤ V
eREF−
≤ V
AVCC
2.2 V/3 V ±1 μA
NOTES: 1. The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, C
i
, is also
the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 12-bit accuracy.
2. The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
3. The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
4. The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.