Datasheet

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SLAS272F − JULY 2000 − REVISED JUNE 2004
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions (Continued)
MSP430x14x1 (continued)
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
P5.6/ACLK 50 I/O General-purpose digital I/O pin/auxiliary clock ACLK output
P5.7/TBOUTH 51 I/O General-purpose digital I/O pin/switch all PWM digital output ports to high impedance − Timer_B7: TB0 to
TB6
P6.0 59 I/O General-purpose digital I/O pin
P6.1 60 I/O General-purpose digital I/O pin
P6.2 61 I/O General-purpose digital I/O pin
P6.3 2 I/O General-purpose digital I/O pin
P6.4 3 I/O General-purpose digital I/O pin
P6.5 4 I/O General-purpose digital I/O pin
P6.6 5 I/O General-purpose digital I/O pin
P6.7 6 I/O General-purpose digital I/O pin
RST/NMI 58 I Reset input, nonmaskable interrupt input port, or bootstrap loader start (in Flash devices).
TCK 57 I Test clock. TCK is the clock input port for device programming test and bootstrap loader start (in Flash
devices).
TDI/TCLK 55 I Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
TDO/TDI 54 I/O Test data output port. TDO/TDI data output or programming data input terminal
TMS 56 I Test mode select. TMS is used as an input port for device programming and test.
DV
SS
10 I Connect to DV
SS
Reserved 7 Reserved, do not connect externally
DV
SS
11 I Connect to DV
SS
XIN 8 I Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
XOUT 9 O Output terminal of crystal oscillator XT1
XT2IN 53 I Input port for crystal oscillator XT2. Only standard crystals can be connected.
XT2OUT 52 O Output terminal of crystal oscillator XT2
QFN Pad NA NA QFN package pad connection to DV
SS
recommended.