Datasheet

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SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
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97
Hardware Version (HDWVER)
7 6 5 4 3 2 1 0 Reset Value
SFR EBh
Flash Memory Control (FMCON)
7 6 5 4 3 2 1 0 Reset Value
SFR EEh 0 PGERA 0 FRCM 0 BUSY SPM FPM 02h
PGERA Page Erase. Available in both user and program modes.
bit 6 0 = Disable Page Erase Mode
1 = Enable Page Erase Mode (automatically set by page_erase Boot ROM routine).
FRCM Frequency Control Mode.
bit 4 0 = Bypass (default)
1 = Use Delay Line. Recommended for saving power.
BUSY Write/Erase BUSY Signal.
bit 2 0 = Idle or Available
1 = Busy
SPM Serial/Parallel Programming Mode. Read-only.
bit 1 0 = Indicates the device is in parallel programming mode.
1 = Indicates the device is in serial programming mode (if FPM also = 1).
FPM Flash Programming Mode. Read-only.
bit 0 0 = Indicates the device is operating in UAM.
1 = Indicates the device is operating in programming mode.
Flash Memory Timing Control (FTCON)
7 6 5 4 3 2 1 0 Reset Value
SFR EFh FER3 FER2 FER1 FER0 FWR3 FWR2 FWR1 FWR0 A5h
Refer to Flash Memory Characteristics
FER3−0 Set Erase. Flash Erase Time = (1 + FER) • (MSEC + 1) • t
CLK
. This can be broken into multiple shorter erase times.
bits 7−4 For more Information, see Application Report SBAA137, Incremental Flash Memory Page Erase, available for
download from www.ti.com.
Industrial temperature range: 10ms
Commercial temperature range: 4ms
FWR3−0 Set Write. Set Flash Write Time = (1 + FWR) • (USEC + 1) • 5 • t
CLK
. Total writing time will be longer. For more
bits 3−0 Information, see Application Report SBAA087, In-Application Flash Programming, available for download from
www.ti.com.
Range: 30µs to 40µs.
B Register (B)
7 6 5 4 3 2 1 0 Reset Value
SFR F0h B.7 B.6 B.5 B.4 B.3 B.2 B.1 B.0 00h
B.7−0 B Register. This register serves as a second accumulator for certain arithmetic operations.
bits 7−0