Datasheet

 
 
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
www.ti.com
76
Port 2 Data Direction High (P2DDRH)
7 6 5 4 3 2 1 0 Reset Value
SFR B2h P27H P27L P26H P26L P25H P25L P24H P24L 00h
P2.7 Port 2 Bit 7 Control.
bits 7−6
P27H P27L
0 0 Standard 8051 (Pull-Up)
0 1 CMOS Output
1 0 Open Drain Output
1 1 Input
P2.6 Port 2 Bit 6 Control.
bits 5−4
P26H P26L
0 0 Standard 8051 (Pull-Up)
0 1 CMOS Output
1 0 Open Drain Output
1 1 Input
P2.5 Port 2 Bit 5 Control.
bits 3−2
P25H P25L
0 0 Standard 8051 (Pull-Up)
0 1 CMOS Output
1 0 Open Drain Output
1 1 Input
P2.4 Port 2 Bit 4 Control.
bits 1−0
P24H P24L
0 0 Standard 8051 (Pull-Up)
0 1 CMOS Output
1 0 Open Drain Output
1 1 Input
NOTE: Port 2 also controlled by EA and Memory Access Control HCR1.EGP23.