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PARAMETER MEASUREMENT INFORMATION
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
−3 V
−3 V
3 V
3 V
0 V
3 V
Output
Input
V
OL
V
OH
t
TLH
Generator
(see Note B)
R
L
3 V
FORCEOFF
RS-232
Output
t
THL
C
L
(see Note A)
SR(tr) +
6 V
t
THL
or t
TLH
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z
O
= 50 Ω, 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
0 V
3 V
Output
Input
V
OL
V
OH
t
PLH
Generator
(see Note B)
R
L
3 V
FORCEOFF
RS-232
Output
t
PHL
C
L
(see Note A)
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z
O
= 50 Ω, 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
50%
50%
1.5 V
1.5 V
TEST CIRCUIT VOLTAGE WAVEFORMS
50 Ω
−3 V
3 V
Output
Input
V
OL
V
OH
t
PHL
Generator
(see Note B)
t
PLH
Output
C
L
(see Note A)
3 V or 0 V
FORCEON
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z
O
= 50 Ω, 50% duty cycle, t
r
≤ 10 ns, t
f
≤ 10 ns.
3 V
FORCEOFF
1.5 V 1.5 V
50% 50%
MAX3227E
3-V TO 5.5-V SINGLE-CHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ± 15-kV IEC ESD PROTECTION
SLLS715A – FEBRUARY 2006 – REVISED JUNE 2007
Figure 1. Driver Slew Rate
Figure 2. Driver Pulse Skew
Figure 3. Receiver Propagation Delay Times
8
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