Datasheet
LM82
SNIS113D –JANUARY 2000–REVISED MARCH 2013
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Logic Electrical Characteristics-
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
CC
=+3.0 Vdc to +3.6 Vdc, C
L
(load capacitance) on output lines =
80 pF. Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= +25°C, unless otherwise noted.
The switching characteristics of the LM82 fully meet or exceed the published specifications of the SMBus or I
2
C bus. The
following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM82. They are not
the I
2
C or SMBus bus specifications.
Typical
(1)
Limits
(2)
Units
Symbol Parameter Conditions
(Limit)
f
SMB
SMBus Clock Frequency 100 kHz (max)
10 kHz (min)
t
LOW
SMBus Clock Low Time 10 % to 10 % 1.3 μs (min)
25 ms (max)
t
LOW
MEXT Cumulative Clock Low Extend Time 10 ms (max)
t
HIGH
SMBus Clock High Time 90 % to 90% 0.6 μs (min)
t
R,SMB
SMBus Rise Time 10% to 90% 1 μs (max)
t
F,SMB
SMBus Fall Time 90% to 10% 0.3 ns (max)
t
OF
Output Fall Time C
L
= 400 pF, 250 ns (max)
I
O
= 3 mA
t
TIMEOUT
SMBData and SMBCLK Time Low for Reset of 25 ms (min)
Serial Interface
(3)
40 ms (max)
t
1
SMBCLK (Clock) Period 10 μs (min)
t
2
, t
SU;DAT
Data In Setup Time to SMBCLK High 100 ns (min)
t
3
, t
HD;DAT
Data Out Stable after SMBCLK Low 300 ns (min)
TBD ns (max)
t
4
, t
HD;STA
SMBData Low Setup Time to SMBCLK Low 100 ns (min)
t
5
, t
SU;STO
SMBData High Delay Time after SMBCLK High 100 ns (min)
(Stop Condition Setup)
t
6
, t
SU;STA
SMBus Start-Condition Setup Time 0.6 μs (min)
t
BUF
SMBus Free Time 1.3 μs (min)
(1) Typicals are at T
A
= 25°C and represent most likely parametric norm.
(2) Limits are ensured to AOQL (Average Outgoing Quality Level).
(3) Holding the SMBData and/or SMBCLK lines Low for a time interval greater than t
TIMEOUT
will cause the LM82 to reset SMBData and
SMBCLK to the IDLE state of an SMBus communication (SMBCLK and SMBData set High).
Figure 2. SMBus Communication
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