Datasheet

MAX

= 1 - f

x 320 x 10

-9

LM5119/LM5119Q

SNVS676F –AUGUST 2010–REVISED FEBRUARY 2013

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HO and LO Output Drivers

The LM5119 contains a high current, high-side driver and associated high voltage level shift to drive the buck

switch of each regulator channel. This gate driver circuit works in conjunction with an external diode and

bootstrap capacitor. A 0.1µF or larger ceramic capacitor, connected with short traces between the HB pin and

SW pin, is recommended. During the off-time of the high-side MOSFET, the SW pin voltage is approximately 0V

and the bootstrap capacitor charges from VCC through the external bootstrap diode. When operating with a high

PWM duty cycle, the buck switch will be forced off each cycle for 320ns to ensure that the bootstrap capacitor is

recharged.

The LO and HO outputs are controlled with an adaptive dead-time methodology which insures that both outputs

are never enabled at the same time. When the controller commands HO to be enabled, the adaptive dead-time

logic first disables LO and waits for the LO voltage to drop. HO is then enabled after a small delay. Similarly, the

LO turn-on is disabled until the HO voltage has discharged. This methodology insures adequate dead-time for

any size MOSFET.

Care should be exercised in selecting an output MOSFET with the appropriate threshold voltage, especially if

VCC is supplied from the regulator output. During startup at low input voltages the MOSFET threshold should be

lower than the 4.9V VCC under-voltage lockout threshold. Otherwise, there may be insufficient VCC voltage to

completely turn on the MOSFET as VCC under-voltage lockout is released during startup. If the buck switch

MOSFET gate drive is not sufficient, the regulator may not start or it may hang up momentarily in a high power

dissipation state. This condition can be avoided by selecting a MOSFET with a lower threshold voltage or if VCC

is supplied from an external source higher than the output voltage. If the minimum input voltage programmed by

the UVLO pin resistor divider is above the VCC regulation level, this precaution is of no concern.

Maximum Duty Cycle

When operating with a high PWM duty cycle, the buck switch will be forced off each cycle for 320ns to ensure

the boot-strap capacitor is recharged and to allow time to sample and hold the current in the low side MOSFET.

This forced off-time limits the maximum duty cycle of the controller. When designing a regulator with high

switching frequency and high duty cycle requirements, a check should be made of the required maximum duty

cycle (including losses) against the graph shown in Figure 6.

The actual maximum duty cycle will vary with the operating frequency as follows:

(6)

Figure 6. Maximum Duty Cycle vs Switching Frequency

Thermal Protection

Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction

temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low power reset state,

disabling the output driver and the VCC bias regulators. This feature is designed to prevent catastrophic failures

from overheating and destroying the device.

Product Folder Links: LM5119/LM5119Q