Datasheet

LM5085, LM5085-Q1
SNVS565G NOVEMBER 2008REVISED MARCH 2013
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P-CHANNEL MOSFET SELECTION
The PFET must be rated for the maximum input voltage, with some margin above that to allow for transients and
ringing which can occur on the supply line and the switching node. The gate-to-source voltage (V
GS
) normally
provided to the PFET is 7.7V for VIN greater than 8.5V. However, if the circuit is to be operated at lower values
of VIN, the selected PFET must be able to fully turn-on with a V
GS
voltage equal to VIN. The minimum input
operating voltage for the LM5085 is 4.5V.
Similar to NFETs, the case or exposed thermal pad for a PFET is electrically connected to the drain terminal.
When designing a PFET buck regulator the drain terminal is connected to the switching node. This situation
requires a trade-off between thermal and EMI performance since increasing the PC board area of the switching
node to aid the PFET power dissipation also increases radiated noise, possibly disrupting the circuit operation.
Typically the switching node area is kept to a reasonable minimum and the PFET peak current is derated to stay
within the recommended temperature rating of the PFET. The R
DS(ON)
of the PFET determines a portion of the
power dissipation in the PFET. However, PFETs with very low R
DS(ON)
usually have large values of gate charge.
A PFET with a higher gate charge has a corresponding slower switching speed, leading to higher switching
losses and affecting the PFET power dissipation.
If the PFET R
DS(ON)
is used for current limit detection, note that it typically has a positive temperature coefficient.
At 100°C the R
DS(ON)
may be as much as 50% higher than the value at 25°C which could result in incorrect
current limiting if not accounted for when determining the value of the R
ADJ
resistor. The PFET Total Gate
Charge determines most of the power dissipation in the LM5085 due to the repetitive charge and discharge of
the PFET’s gate capacitance by the gate driver (powered from the VCC regulator). The LM5085’s internal power
dissipation can be calculated from the following:
P
DISS
= V
IN
x ((Q
G
x F
S
) + I
IN
) (14)
where Q
G
is the PFET's Total Gate Charge obtained from its datasheet, F
S
is the switching frequency, and I
IN
is
the LM5085's operating current obtained from the graph "Input Operating Current vs. V
IN
". Using the Thermal
Resistance specifications in the Electrical Characteristics table, the approximate junction temperature can be
determined. If the calculated junction temperature is near the maximum operating temperature of 125°C, either
the switching frequency must be reduced, or a PFET with a smaller Total Gate Charge must be used.
SOFT-START
The internal soft-start feature of the LM5085 allows the regulator to gradually reach a steady state operating
point at power up, thereby reducing startup stresses and current surges. Upon turn-on, when Vcc reaches its
under-voltage lockout threshold, the internal soft-start circuit ramps the feedback reference voltage from 0V to
1.25V, causing V
OUT
to ramp up in a proportional manner. The soft-start ramp time is typically 2.5ms.
In addition to controlling the initial power up cycle, the soft-start circuit also activates when the LM5085 is
enabled by releasing the RT pin, and when the circuit is shutdown and restarted by the internal Thermal
Shutdown circuit.
If the voltage at FB is below the regulation threshold value due to an over-current condition or a short circuit at
V
OUT
, the internal reference voltage provided by the soft-start circuit to the regulation comparator is reduced
along with FB. When the over-current or short circuit condition is removed, V
OUT
returns to the regulated value at
a rate determined by the soft-start ramp. This feature helps prevent the output voltage from overshooting
following an overload event.
THERMAL SHUTDOWN
The LM5085 should be operated such that the junction temperature does not exceed 125°C. If the junction
temperature increases above that, an internal Thermal Shutdown circuit activates at 170°C (typical) to disable
the VCC regulator and the gate driver, and discharge the soft-start capacitor. This feature helps prevent
catastrophic failures from accidental device overheating. When the junction temperature falls below 150°C
(typical hysteresis = 20°C), the gate driver is enabled, the soft-start circuit is released, and normal operation
resumes.
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