Datasheet

1
3 4
6
En
Pgnd
Vin
2
5
Sw
Sgnd
Fb
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LM3671
LM3671Q
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SNVS294Q NOVEMBER 2004REVISED NOVEMBER 2013
Figure 5. 6-Pin USON Package
See Package Number NKH0006B (2 mm x 2 mm x 0.6 mm)
PIN DESCRIPTIONS (SOT-23)
Pin # Name Description
1 V
IN
Power supply input. Connect to the input filter capacitor (Figure 1).
2 GND Ground pin.
3 EN Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
4 FB Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
5 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier.
PIN DESCRIPTIONS (5-Bump DSBGA)
Pin # Name Description
A1 V
IN
Power supply input. Connect to the input filter capacitor (Figure 1).
A3 GND Ground pin.
C1 EN Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
C3 FB Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
B2 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier.
PIN DESCRIPTIONS (6-Pin USON)
Pin # Name Description
1 EN Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
2 Pgnd Ground pin.
3 V
IN
Power supply input. Connect to the input filter capacitor (Figure 1).
4 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier.
5 Sgnd Singnal ground (feedback ground).
6 FB Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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