Datasheet
LM2664
SNVS005D –NOVEMBER 1999–REVISED MAY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
Supply Voltage (V+ to GND, or GND to OUT) 5.8V
SD (GND − 0.3V) to (V+ +
0.3V)
V+ and OUT Continuous Output Current 50 mA
Output Short-Circuit Duration to GND
(3)
1 sec.
Continuous Power 600 mW
Dissipation (T
A
= 25°C)
(4)
T
JMax
(4)
150°C
θ
JA
(4)
210°C/W
Operating Junction Temperature Range −40° to 85°C
Storage Temperature Range −65°C to +150°C
Lead Temp. (Soldering, 10 seconds) 300°C
ESD Rating 2kV
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be
avoided. Also, for temperatures above 85°C, OUT must not be shorted to GND or V+, or device may be damaged.
(4) The maximum allowable power dissipation is calculated by using P
DMax
= (T
JMax
− T
A
)/θ
JA
, where T
JMax
is the maximum junction
temperature, T
A
is the ambient temperature, and θ
JA
is the junction-to-ambient thermal resistance of the specified package.
Electrical Characteristics
Limits in standard typeface are for T
J
= 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: V+ = 5V, C
1
= C
2
= 3.3 μF.
(1)
Symbol Parameter Condition Min Typ Max Units
(2) (3) (2)
V+ Supply Voltage 1.8 5.5 V
I
Q
Supply Current No Load 220 500 µA
I
SD
Shutdown Supply Current 1 µA
V
SD
Shutdown Pin Input Voltage Normal Operation 2.0
(4)
V
Shutdown Mode 0.8
(5)
I
L
Output Current 40 mA
R
SW
Sum of the R
ds(on)
of the four internal I
L
= 40 mA 4 8
Ω
MOSFET switches
R
OUT
Output Resistance
(6)
I
L
= 40 mA 12 25 Ω
f
OSC
Oscillator Frequency
(7)
80 160 kHz
f
SW
Switching Frequency
(7)
40 80 kHz
P
EFF
Power Efficiency R
L
(1.0k) between GND and OUT 90 94
%
I
L
= 40 mA to GND 91
V
OEFF
Voltage Conversion Efficiency No Load 99 99.96 %
(1) In the test circuit, capacitors C
1
and C
2
are 3.3 µF, 0.3Ω maximum ESR capacitors. Capacitors with higher ESR will increase output
resistance, reduce output voltage and efficiency.
(2) Min. and Max. limits are ensured by design, test, or statistical analysis.
(3) Typical numbers are not ensured but represent the most likely norm.
(4) The minimum input high for the shutdown pin equals 40% of V+.
(5) The maximum input low for the shutdown pin equals 20% of V+.
(6) Specified output resistance includes internal switch resistance and capacitor ESR. See the details in the application information for
simple negative voltage converter.
(7) The output switches operate at one half of the oscillator frequency, f
OSC
= 2f
SW
.
2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: LM2664