Datasheet

EN
V
in
R
ENB
R
ENT
LM22670
SNVS584O –SEPTEMBER 2008–REVISED MARCH 2013 www.ti.com
Precision Enable and UVLO
The precision enable input (EN) is used to control the regulator. The precision feature allows simple sequencing
of multiple power supplies with a resistor divider from another supply. Connecting this pin to ground or to a
voltage less than 1.6V (typ.) will turn off the regulator. The current drain from the input supply, in this state, is 25
µA (typ.) at an input voltage of 12V. The EN input has an internal pull-up of about 6 µA. Therefore this pin can be
left floating or pulled to a voltage greater than 2.2V (typ.) to turn the regulator on. The hysteresis on this input is
about 0.6V (typ.) above the 1.6V (typ.) threshold. When driving the enable input, the voltage must never exceed
the 6V absolute maximum specification for this pin.
Although an internal pull-up is provided on the EN pin, it is good practice to pull the input high, when this feature
is not used, especially in noisy environments. This can most easily be done by connecting a resistor between
VIN and the EN pin. The resistor is required, since the internal zener diode, at the EN pin, will conduct for
voltages above about 6V. The current in this zener must be limited to less than 100 µA. A resistor of 470 kΩ will
limit the current to a safe value for input voltages as high 42V. Smaller values of resistor can be used at lower
input voltages.
The LM22670 also incorporates an input under voltage lock-out (UVLO) feature. This prevents the regulator from
turning on when the input voltage is not great enough to properly bias the internal circuitry. The rising threshold is
4.3V (typ.) while the falling threshold is 3.9V (typ.). In some cases these thresholds may be too low to provide
good system performance. The solution is to use the EN input as an external UVLO to disable the part when the
input voltage falls below a lower boundary. This is often used to prevent excessive battery discharge or early
turn-on during start-up. This method is also recommended to prevent abnormal device operation in applications
where the input voltage falls below the minimum of 4.5V. Figure 14 shows the connections to implement this
method of UVLO. The following equations can be used to determine the correct resistor values:
(1)
(2)
Where V
off
is the input voltage where the regulator shuts off, and V
on
is the voltage where the regulator turns on.
Due to the 6 µA pull-up, the current in the divider should be much larger than this. A value of 20 kΩ, for R
ENB
is a
good first choice. Also, a zener diode may be needed between the EN pin and ground, in order to comply with
the absolute maximum ratings on this pin.
Figure 14. External UVLO Connections
Duty-Cycle Limits
Ideally the regulator would control the duty cycle over the full range of zero to one. However due to inherent
delays in the circuitry, there are limits on both the maximum and minimum duty cycles that can be reliably
controlled. This in turn places limits on the maximum and minimum input and output voltages that can be
converted by the LM22670. A minimum on-time is imposed by the regulator in order to correctly measure the
switch current during a current limit event. A minimum off-time is imposed in order the re-charge the bootstrap
capacitor. The following equation can be used to determine the approximate maximum input voltage for a given
output voltage:
(3)
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