Datasheet

LM20143
SNVS528G –OCTOBER 2007–REVISED MARCH 2013 www.ti.com
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, the following conditions apply: AVIN = PVIN = VIN = 5V. Limits in standard type are for T
J
= 25°C
only, limits in bold face type apply over the junction temperature (T
J
) range of -40°C to +125°C. Minimum and Maximum
limits are specifed by test, design, or statistical correlation. Typical values represent the most likely parametric norm at T
J
=
25°C, and are provided for reference purposes only.
Symbol Parameter Conditions Min Typ Max Unit
V
FB
Feedback pin voltage V
IN
= 2.95V to 5.5V 0.788 0.8 0.812 V
ΔV
OUT
/ΔI
OUT
Load Regulation I
OUT
= 100 mA to 3A 0.08 %/A
I
CL
Switch Current Limit Threshold V
IN
= 3.3V 4.3 4.8 5.3 A
R
DS_ON
High-Side Switch On Resistance I
SW
= 3.5A 36 55 mΩ
R
DS_ON
Low-Side Switch On Resistance I
SW
= 3.5A 32 52 mΩ
I
Q
Operating Quiescent Current Non-switching, V
FB
= V
COMP
3.5 6 mA
I
SD
Shutdown Quiescent current V
EN
= 0V 90 180 µA
V
UVLO
VIN Under Voltage Lockout Rising V
IN
2.45 2.7 2.95 V
V
UVLO_HYS
VIN Under Voltage Lockout Hysteresis Falling V
IN
45 100 mV
V
VCC
VCC Voltage I
VCC
= 0 µA 2.45 2.7 2.95 V
I
SS
Soft-Start Pin Source Current V
SS/TRK
= 0V 2 4.5 7 µA
V
TRACK
SS/TRK Accuracy, V
SS
- V
FB
V
SS/TRK
= 0.4V -10 3 15 mV
Oscillator
F
OSCH
Oscillator Frequency R
T
= 49.9 kΩ 1350 1500 1650 kHz
F
OSCL
Oscillator Frequency R
T
= 249 kΩ 450 510 570 kHz
DC
MAX
Maximum Duty Cycle I
LOAD
= 0A 85 %
T
ON_TIME
Minimum On Time 100 ns
T
CL_BLANK
Current Sense Blanking Time After Rising V
SW
80 ns
Error Amplifier and Modulator
I
FB
Feedback pin bias current V
FB
= 0.8V 1 100 nA
I
COMP_SRC
COMP Output Source Current V
FB
= V
COMP
= 0.6V 80 100 µA
I
COMP_SNK
COMP Output Sink Current V
FB
= 1.0V, V
COMP
= 0.6V 80 100 µA
Gm Error Amplifier Transconductance I
COMP
= ± 50 µA 450 510 600 µmho
A
VOL
Error Amplifier Voltage Gain 2000 V/V
Power Good
V
OVP
Over Voltage Protection Rising Threshold 105 108 111 %
With respect to V
FB
V
OVP_HYS
Over Voltage Protection Hysteresis 2 3 %
V
PGTH
PGOOD Rising Threshold 92 94 96 %
With respect to V
FB
V
PGHYS
PGOOD Falling Hysteresis 2 3 %
T
PGOOD
PGOOD deglitch time 16 µs
I
OL
PGOOD Low Sink Current V
PGOOD
= 0.4V 0.6 1 mA
I
OH
PGOOD High Leakage Current V
PGOOD
= 5V 5 100 nA
Enable
V
IH_EN
EN Pin turn-on Threshold V
EN
Rising 1.08 1.18 1.28 V
V
EN_HYS
EN Pin Hysteresis 66 mV
Thermal Shutdown
T
SD
Thermal Shutdown 160 °C
T
SD_HYS
Thermal Shutdown Hysteresis 10 °C
Thermal Resistance
θ
JA
Junction to Ambient See
(1)
38
°C/W
θ
JC
Junction to Case See
(2)
3.5
(1) On JEDEC 4-Layer test board (JESD 51-7) with eight (8) thermal vias.
(2) θ
JC
refers to center of the Exposed Pad on the bottom of the package as the Case.
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