Datasheet
DRV8812
www.ti.com
SLVS997F –OCTOBER 2009–REVISED AUGUST 2013
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1) (2)
VALUE UNIT
VMx Power supply voltage range –0.3 to 47 V
Digital pin voltage range –0.5 to 7 V
VREF Input voltage –0.3 to 4 V
ISENSEx pin voltage –0.3 to 0.8 V
Peak motor drive output current, t < 1 μS Internally limited A
Continuous motor drive output current
(3)
1.6 A
Continuous total power dissipation See Dissipation Ratings table
T
J
Operating virtual junction temperature range –40 to 150 °C
T
A
Operating ambient temperature range –40 to 85 °C
T
stg
Storage temperature range –60 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Power dissipation and thermal limits must be observed.
THERMAL INFORMATION
DRV8812
THERMAL METRIC
(1)
PWP RHD UNITS
28 PINS 28 PINS
θ
JA
Junction-to-ambient thermal resistance
(2)
38.9 35.8
θ
JCtop
Junction-to-case (top) thermal resistance
(3)
23.3 25.1
θ
JB
Junction-to-board thermal resistance
(4)
21.2 8.2
°C/W
ψ
JT
Junction-to-top characterization parameter
(5)
0.8 0.3
ψ
JB
Junction-to-board characterization parameter
(6)
20.9 8.2
θ
JCbot
Junction-to-case (bottom) thermal resistance
(7)
2.6 1.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
M
Motor power supply voltage range
(1)
8.2 45 V
V
REF
VREF input voltage
(2)
1 3.5 V
I
V3P3
V3P3OUT load current 1 mA
(1) All V
M
pins must be connected to the same supply voltage.
(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
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