Datasheet

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DP83848T
8.2.21 100BASE-TX Signal Detect Timing
Note: The signal amplitude on PMD Input Pair must be TP-PMD compliant.
8.2.22 100 Mb/s Internal Loopback Timing
Note: Due to the nature of the descrambler function, all 100BASE-TX Loopback modes will cause an initial “dead-time”
of up to 550 µs during which time no data will be present at the receive MII outputs. The 100BASE-TX timing specified is
based on device delays after the initial 550µs “dead-time”.
Note: Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
Parameter Description Notes Min Typ Max Units
T2.21.1 SD Internal Turn-on Time 1 ms
T2.21.2 SD Internal Turn-off Time 350 µs
Parameter Description Notes Min Typ Max Units
T2.22.1 TX_EN to RX_DV Loopback 100 Mb/s internal loopback mode 240 ns
T2.21.1
SD+ internal
T2.21.2
PMD Input Pair
TX_CLK
TX_EN
TXD[3:0]
CRS
RX_CLK
RXD[3:0]
RX_DV
T2.22.1