Datasheet

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DP83848T
AN0 (LED_LINK) S, O, PU 22 This input pin controls the advertised operating mode of the
DP83848T according to the following table. The value on this pin
is set by connecting it to GND (0) or V
CC
(1) through 2.2 kresis-
tors. This pin should NEVER be connected directly to GND or
VCC.
The value set at this input is latched into the DP83848T at Hard-
ware-Reset.
The float/pull-down status of this pin is latched into the Basic
Mode Control Register and the Auto_Negotiation Advertisement
Register during Hardware-Reset.
The default is 1 since this pin has an internal pull-up.
MII_MODE (RX_DV) S, O, PD 32 MII MODE SELECT: This strapping option determines the oper-
ating mode of the MAC Data Interface. Default operation (No pull-
up) will enable normal MII Mode of operation. Strapping
MII_MODE high will cause the device to be in RMII mode of oper-
ation. Since the pin includes an internal pull-down, the default val-
ue is 0.
The following table details the configuration:
LED_CFG (CRS/CRS_DV) S, O, PU 33 LED CONFIGURATION: This strapping option determines the
mode of operation of the LED pins. Default is Mode 1. Mode 1 and
Mode 2 can be controlled via the strap option. All modes are con-
figurable via register access.
SeeTable 3 for LED Mode Selection.
MDIX_EN (RX_ER) S, O, PU 34 MDIX ENABLE: Default is to enable MDIX. This strapping option
disables Auto-MDIX. An external pull-down will disable Auto-
MDIX mode.
Signal Name Type Pin # Description
AN0 Advertised Mode
0 10BASE-T Half-Duplex
100BASE-TX, Half-Duplex
1 10BASE-T, Half/Full-Duplex
100BASE-TX, Half/Full-Duplex
MII_MODE MAC Interface Mode
0 MII Mode
1 RMII Mode