Datasheet

www.ti.com
ELECTRICAL CHARACTERISTICS
DAC8814
SBAS338D – JANUARY 2005 – REVISED SEPTEMBER 2006
V
DD
= 2.7 V to 5.5 V; I
OUT
X = Virtual GND, A
GND
X = 0 V, V
REF
A, B, C, D = 10 V, T
A
= full operating temperature range, unless
otherwise noted.
DAC8814
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
STATIC PERFORMANCE
(1)
Resolution 16 Bits
Relative accuracy INL DAC8814B ± 4 LSB
INL DAC8814C ± 1 LSB
Differential nonlinearity DNL DAC8814B ± 1.5 LSB
DNL DAC8814C ± 1 LSB
Output leakage current I
OUT
X Data = 0000h, T
A
= 25 ° C 10 nA
I
OUT
X Data = 0000h, T
A
= T
A
max 20 nA
Full-scale gain error G
FSE
Data = FFFFh ± 0.75 ± 3 mV
Full-scale tempco
(2)
TCV
FS
1 ppm/ ° C
Feedback resistor R
FB
X V
DD
= 5 V 5 k Ω
REFERENCE INPUT
V
REF
X Range V
REF
X –15 15 V
Input resistance R
REF
X 4 5 6 k Ω
Input resistance match R
REF
X Channel-to-channel 1 %
Input capacitance
(2)
C
REF
X 5 pF
ANALOG OUTPUT
Output current I
OUT
X Data = FFFFh 1.6 2.5 mA
Output capacitance
(2)
C
OUT
X Code-dependent 50 pF
LOGIC INPUTS AND OUTPUT
Input low voltage V
IL
V
DD
= +2.7 V 0.6 V
V
IL
V
DD
= +5 V 0.8 V
Input high voltage V
IH
V
DD
= +2.7 V 2.1 V
V
IH
V
DD
= +5 V 2.4 V
Input leakage current I
IL
1 µ A
Input capacitance
(2)
C
IL
10 pF
Logic output low voltage V
OL
I
OL
= 1.6 mA 0.4 V
Logic output high voltage V
OH
I
OH
= 100 µ A 4 V
INTERFACE TIMING
(2)
,
(3)
Clock input frequency f
CLK
50 MHz
Clock width high t
CH
10 ns
Clock width low t
CL
10 ns
CS to Clock setup t
CSS
0 ns
Clock to CS hold t
CSH
10 ns
Clock to SDO prop delay t
PD
2 20 ns
Load DAC pulsewidth t
LDAC
25 ns
Data setup t
DS
5 ns
Data hold t
DH
10 ns
Load setup t
LDS
5 ns
Load hold t
LDH
10 ns
(1) All static performance tests (except I
OUT
) are performed in a closed-loop system using an external precision OPA277 I-to-V converter
amplifier. The DAC8814 R
FB
terminal is tied to the amplifier output. Typical values represent average readings measured at +25 ° C.
(2) These parameters are specified by design and not subject to production testing.
(3) All input control signals are specified with t
R
= t
F
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.
3
Submit Documentation Feedback