Datasheet

200 V/divm
AV =5.5V
DD
FromCode:4000h
ToCode:C000h
Rising
Edge
1V/div
TriggerPulse5V/div
InternalReferenceEnabled
Time(2ms/div)
ZoomedRisingEdge
200 V/divm
AV =5.5V
DD
FromCode:C000h
ToCode:4000h
Falling
Edge
1V/div
TriggerPulse5V/div
InternalReferenceEnabled
Time(2ms/div)
ZoomedFallingEdge
AV
DD
=5.5V
ClockFeedthroughImpulse~0.5nV-s
InternalReferenceEnabled
V
OUT
(2mV/div)
Time(1ms/div)
SCLK (5V/div)
AV
DD
(5V/div)
V
OUT
(20mV/div)
Time(4ms/div)
AV
DD
=5.5V
ExternalReference=2.5V
DAC=ZeroScale
Load=470pF||2kW
ChannelC
~18mV
PP
~4mV
PP
ChannelD
AV (1V/div)
DD
V (200mV/div)
OUT
Time(20ms/div)
AV =5.5V
DD
ExternalReference=2.5V
DAC=Midscale
Load=470pF||2kW
ChannelsA/B
AV
DD
AV (5V/div)
DD
V (20mV/div)
OUT
Time(4ms/div)
AV =5.5V
DD
DAC=ZeroScale
Load=470pF||2kW
ChannelC
ChannelD
~4mV
PP
DAC7568
DAC8168
DAC8568
www.ti.com
SBAS430D JANUARY 2009REVISED MAY 2012
TYPICAL CHARACTERISTICS: DAC at AV
DD
= 5.5V (continued)
Channel-specific information provided as examples. At T
A
= +25°C, external reference used, DAC output not loaded, and all
DAC codes in straight binary data format, unless otherwise noted.
HALF-SCALE SETTLING TIME: HALF-SCALE SETTLING TIME:
5V RISING EDGE 5V FALLING EDGE
Figure 54. Figure 55.
CLOCK FEEDTHROUGH POWER-ON GLITCH
2MHz, MIDSCALE RESET TO ZERO SCALE
Figure 56. Figure 57.
POWER-ON GLITCH
RESET TO MIDSCALE POWER-OFF GLITCH
Figure 58. Figure 59.
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