Datasheet

DAC7728
www.ti.com
SBAS461A JUNE 2009REVISED NOVEMBER 2009
ELECTRICAL CHARACTERISTICS: Single-Supply
All specifications at T
A
= T
MIN
to T
MAX
, AV
DD
= +32V, AV
SS
= 0V, DV
DD
= +5V, REF-A and REF-B = +5V, gain = 6, AGND-x =
DGND = 0V, and OFFSET-A = OFFSET-B = AGND, unless otherwise noted.
DAC7728
PARAMETER CONDITIONS MIN TYP MAX UNIT
STATIC PERFORMANCE
Resolution 12 Bits
Linearity error Measured by line passing through codes 010h and FFFh ±1 LSB
Differential linearity error Measured by line passing through codes 010h and FFFh ±1 LSB
Unipolar zero error T
A
= +25°C, gain = 4 or 6, code = 010h ±1 LSB
Unipolar zero error TC Gain = 4 or 6, code = 010h ±0.5 ±3 ppm FSR/°C
Gain error T
A
= +25°C, gain = 4 or 6 ±1 LSB
Gain error TC Gain = 4 or 6 ±1 ±3 ppm FSR/°C
Full-scale error T
A
= +25°C, gain = 4 or 6, code = FFFh ±1 LSB
Full-scale error TC Gain = 4 or 6, code = FFFh ±0.5 ±3 ppm FSR/°C
Measured channel at code = 800h, full-scale change on any
DC crosstalk
(1)
0.05 LSB
other channel
ANALOG OUTPUT (V
OUT
-0 to V
OUT
-7)
(2)
V
REF
= +5V 0 +30 V
Voltage output
(3)
V
REF
= +1.5V 0 +9 V
Output impedance Code = 800h 0.5
Short-circuit current
(4)
±10 mA
Load current See Figure 89 and Figure 90 ±3 mA
T
A
= +25°C, Device operating for 500 hours, full-scale output 3.4 ppm of FSR
Output drift vs time
T
A
= +25°C, Device operating for 1000 hours, full-scale output 4.3 ppm of FSR
Capacitive load stability 500 pF
To 0.03% of FSR, C
L
= 200pF, R
L
= 10k, code from 010h to
10 μs
FFFh and FFFh to 010h
To 1 LSB, C
L
= 200pF, R
L
= 10k, code from 010h to FFFh
Settling time 15 μs
and FFFh to 010h
To 1 LSB, C
L
= 200pF, R
L
= 10k, code from 7C0h to 840h
6 μs
and 840h to 7C0h
Slew rate
(5)
6 V/μs
Power-on delay
(6)
From IOV
DD
+1.8V and DV
DD
+2.7V to CS low 200 μs
Power-down recovery time 50 μs
Digital-to-analog glitch
(7)
Code from 7FFh to 800h and 800h to 7FFh 4 nV-s
Glitch impulse peak amplitude Code from 7FFh to 800h and 800h to 7FFh 5 mV
Channel-to-channel isolation
(8)
V
REF
= 4V
PP
, f = 1kHz 88 dB
DACs in the same group 10 nV-s
DAC-to-DAC crosstalk
(9)
DACs among different groups 1 nV-s
Digital crosstalk
(10)
1 nV-s
(1) The DAC outputs are buffered by op amps that share common AV
DD
and AV
SS
power supplies. DC crosstalk indicates how much dc
change in one or more channel outputs may occur when the dc load current changes in one channel (because of an update). With
high-impedance loads, the effect is virtually immeasurable. Multiple AV
DD
and AV
SS
terminals are provided to minimize dc crosstalk.
(2) Specified by design.
(3) The analog output range of V
OUT
-0 to V
OUT
-7 is equal to (6 × V
REF
) for gain = 6. The maximum value of the analog output must not be
greater than (AV
DD
– 0.5V). All specifications are for a +32V power supply and a 0V to +30V output, unless otherwise noted.
(4) When the output current is greater than the specification, the current is clamped at the specified maximum value.
(5) Slew rate is measured from 10% to 90% of the transition when the output changes from 0 to full-scale.
(6) Power-on delay is defined as the time from when the supply voltages reach the specified conditions to when CS goes low, for valid
digital communication.
(7) Digital-to-analog glitch is defined as the amount of energy injected into the analog output at the major code transition. It is specified as
the area of the glitch in nV-s. It is measured by toggling the DAC register data between 7FFh and 800h in straight binary format.
(8) Channel-to-channel isolation refers to the ratio of the signal amplitude at the output of one DAC channel to the amplitude of the
sinusoidal signal on the reference input of another DAC channel. It is expressed in dB and measured at midscale.
(9) DAC-to-DAC crosstalk is the glitch impulse that appears at the output of one DAC as a result of both the full-scale digital code and
subsequent analog output change at another DAC. It is measured with LDAC tied low and expressed in nV-s.
(10) Digital crosstalk is the glitch impulse transferred to the output of one converter as a result of a full-scale code change in the DAC input
register of another converter. It is measured when the DAC output is not updated, and is expressed in nV-s.
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