Datasheet

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REF02
15 V
5 V
1.6 mA
V
DD
SCL
SDA
I
2
C
Interface
V
OUT
= 0 V to 5 V
DAC7573
LAYOUT
DAC7573
SLAS398 – SEPTEMBER 2003
APPLICATION INFORMATION (continued)
V
DD
= 5 V. When a DAC output is loaded, the REF02 also needs to supply the current to the load. The total
typical current required (with a 5-k Ω load on a single DAC output) is:
600 µA + (5 V / 5 k Ω) = 1.6 mA
The load regulation of the REF02 is typically 0.005%/mA, which results in an error of 400 µV for 1.6 mA of
current drawn from it. This corresponds to a 0.33 LSB error for a 0 V to 5 V output range.
Figure 42. REF02 Power Supply
A precision analog component requires careful layout, adequate bypassing, and clean, well-regulated power
supplies.
The power applied to V
DD
should be well-regulated and low noise. Switching power supplies and dc/dc
converters often have high-frequency glitches or spikes riding on the output voltage. In addition, digital
components can create similar high-frequency spikes as their internal logic switches states. This noise can easily
couple into the DAC output voltage through various paths between the power connections and analog output.
As with the GND connection, V
DD
should be connected to a positive power-supply plane or trace that is separate
from the connection for digital logic until they are connected at the power-entry point. In addition, a 1 µF to 10 µF
capacitor in parallel with a 0.1 µF bypass capacitor is strongly recommended. In some situations, additional
bypassing may be required, such as a 100 µF electrolytic capacitor or even a Pi filter made up of inductors and
capacitors—all designed to essentially low-pass filter the –5 V supply, removing the high-frequency noise.
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