Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) SC 70 6

Power-On

Reset

DAC

8-/10-/12-Bit

DAC

Output

Buffer

InputControl

Logic

Power-Down

ControlLogic

Resistor

Network

SYNC

SCLK

GND

OUT

REF(+)

DAC5311

DAC6311

DAC7311

www.ti.com

SBAS442B –AUGUST 2008–REVISED MAY 2013

2.0V to 5.5V, 80μA, 8-, 10-, and 12-Bit, Low-Power, Single-Channel,

Digital-to-Analog Converters in SC70 Package

Check for Samples: DAC5311, DAC6311, DAC7311

FEATURES

DESCRIPTION

The DAC5311 (8-bit), DAC6311 (10-bit), and

234

• Relative Accuracy:

DAC7311 (12-bit) are low-power, single-channel,

– 0.25 LSB INL (DAC5311: 8-bit)

voltage output digital-to-analog converters (DAC).

– 0.5 LSB INL (DAC6311: 10-bit)

They are monotonic by design and provide excellent

linearity and minimize undesired code-to-code

– 1 LSB INL (DAC7311: 12-bit)

transient voltages while offering an easy upgrade

• microPower Operation: 80μA at 2.0V

path within a pin-compatible family. All devices use a

• Power-Down: 0.5μA at 5V, 0.1μA at 2.0V

versatile, 3-wire serial interface that operates at clock

rates of up to 50MHz and is compatible with standard

• Wide Power Supply: +2.0V to +5.5V

SPI™, QSPI™, MICROWIRE™, and digital signal

• Power-On Reset to Zero Scale

processor (DSP) interfaces.

• Straight Binary Data Format

All devices use an external power supply as a

• Low Power Serial Interface with Schmitt-

reference voltage to set the output range. The

Triggered Inputs: Up to 50MHz

devices incorporate a power-on reset (POR) circuit

• On-Chip Output Buffer Amplifier, Rail-to-Rail

that ensures the DAC output powers up at 0V and

Operation

remains there until a valid write to the device occurs.

The DAC5311, DAC6311, and DAC7311 contain a

• SYNC Interrupt Facility

power-down feature, accessed over the serial

• Extended Temperature Range –40°C to +125°C

interface, that reduces current consumption of the

• Pin-Compatible Family in a Tiny, 6-Pin SC70

device to 0.1μA at 2.0V in power down mode. The

Package low power consumption of this part in normal

operation makes it ideally suited for portable, battery-

operated equipment. The power consumption is

APPLICATIONS

0.55mW at 5V, reducing to 2.5μW in power-down

• Portable, Battery-Powered instruments

mode.

• Process Control

These devices are pin-compatible with the DAC8311

• Digital Gain and Offset Adjustment

and DAC8411, offering an easy upgrade path from

8-, 10-, and 12-bit resolution to 14- and 16-bit. All

• Programmable Voltage and Current Sources

devices are available in a small, 6-pin, SC70

package. This package offers a flexible, pin-

compatible, and functionally-compatible drop-in

RELATED solution within the family over an extended

DEVICES 16-BIT 14-BIT 12-BIT 10-BIT 8-BIT

temperature range of –40°C to +125°C.

Pin and

Function DAC8411 DAC8311 DAC7311 DAC6311 DAC5311

Compatible

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SPI, QSPI are trademarks of Motorola, Inc.

3MICROWIRE is a trademark of National Semiconductor Corporation.

4All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (37 pages)

PAGE 1
DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 2.0V to 5.5V, 80μA, 8-, 10-, and 12-Bit, Low-Power, Single-Channel, Digital-to-Analog Converters in SC70 Package Check for Samples: DAC5311, DAC6311, DAC7311 FEATURES DESCRIPTION • Relative Accuracy: – 0.25 LSB INL (DAC5311: 8-bit) – 0.5 LSB INL (DAC6311: 10-bit) – 1 LSB INL (DAC7311: 12-bit) • microPower Operation: 80μA at 2.0V • Power-Down: 0.5μA at 5V, 0.1μA at 2.0V • Wide Power Supply: +2.0V to +5.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 ELECTRICAL CHARACTERISTICS At AVDD = +2.0V to +5.5V, RL = 2kΩ to GND, and CL = 200 pF to GND, unless otherwise noted.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At AVDD = +2.0V to +5.5V, RL = 2kΩ to GND, and CL = 200 pF to GND, unless otherwise noted. DAC5311, DAC6311, DAC7311 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOGIC INPUTS (6) ±1 μA AVDD = 2.7V to 5.5V 0.3AVDD V AVDD = 2.0V to 2.7V 0.1AVDD V Input current VINL, input low voltage VINH, input high voltage AVDD = 2.7V to 5.5V 0.7AVDD AVDD = 2.0V to 2.7V 0.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 PIN CONFIGURATION DCK PACKAGE SC70-6 (TOP VIEW) SYNC 1 6 VOUT SCLK 2 5 GND DIN 3 4 AVDD/VREF Table 1. PIN DESCRIPTION PIN NAME DESCRIPTION 1 SYNC Level-triggered control input (active low). This is the frame sychronization signal for the input data. When SYNC goes low, it enables the input shift register and data are transferred in on the falling edges of the following clocks.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com SERIAL WRITE OPERATION t9 t1 SCLK 1 16 t8 t3 t4 t2 t7 SYNC t10 t6 t5 DIN DB15 DB0 DB15 TIMING REQUIREMENTS (1) All specifications at –40°C to +125°C, and AVDD = +2.0V to +5.5V, unless otherwise noted.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +5V At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted. DAC7311 12-BIT LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (–40°C) 0.10 AVDD = 5V LE (LSB) 0.25 0 0 -0.05 -0.50 -0.10 0.2 0.06 0.1 0 -0.1 -0.2 AVDD = 5V 0.05 -0.25 DLE (LSB) DLE (LSB) LE (LSB) 0.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +5V (continued) At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted. DAC5311 8-BIT LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (–40°C) 0.4 AVDD = 5V 0.01 AVDD = 5V 0 Zero-Code Error (mV) LE (LSB) 0.02 -0.01 -0.02 0.02 DLE (LSB) ZERO-CODE ERROR vs TEMPERATURE 0.01 0 0.3 0.2 0.1 -0.01 0 -40 -25 -10 -0.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +5V (continued) At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted. SOURCE CURRENT AT POSITIVE RAIL SINK CURRENT AT NEGATIVE RAIL 0.6 AVDD = 5V DAC Loaded with 000h 5.0 Analog Output Voltage (V) Analog Output Voltage (V) 5.5 4.5 4.0 3.5 3.0 AVDD = 5V DAC Loaded with FFFh 2.5 0 2 0.4 0.2 0 4 6 8 10 0 2 4 ISOURCE (mA) Figure 14.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +5V (continued) At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +5V (continued) At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted. VOUT (500mV/div) CLOCK FEEDTHROUGH 5V, 2MHz, MIDSCALE AVDD = 5V Clock Feedthrough Impulse ~0.5nV-s Time (500ns/div) Figure 24. GLITCH ENERGY 5V, 12-BIT, 1LSB STEP, RISING EDGE GLITCH ENERGY 5V, 12-BIT, 1LSB STEP, FALLING EDGE Glitch Impulse < 0.5nV-s Clock Feedthrough ~0.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +5V (continued) At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +5V (continued) At TA = +25°C, AVDD = +5V, and DAC loaded with midscale code, unless otherwise noted. POWER-SUPPLY CURRENT vs POWER-SUPPLY VOLTAGE POWER-DOWN CURRENT vs POWER-SUPPLY VOLTAGE 0.4 120 AVDD = 2.0V to 5.5V 110 Quiescent Current (mA) Power-Supply Current (mA) AVDD = 2.0V to 5.5V 100 90 80 0.3 0.2 0.1 0 70 2.0 2.5 3.0 3.5 4.5 4.0 2.0 5.5 5.0 2.5 3.0 3.5 4.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +3.6V At TA = 25°C, AVDD = +3.6V, and DAC loaded with midscale code, unless otherwise noted. POWER-SUPPLY CURRENT vs TEMPERATURE POWER-DOWN CURRENT vs TEMPERATURE 140 1.2 AVDD = 3.6V 130 Quiescent Current (mA) 120 110 100 0.8 0.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +2.7V At TA = 25°C, AVDD = +2.7V, and DAC loaded with midscale code, unless otherwise noted. DAC7311 12-BIT LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (–40°C) 0.10 AVDD = 2.7V LE (LSB) 0.25 0 0 -0.05 -0.50 -0.10 0.2 0.06 0.1 0 -0.1 -0.2 AVDD = 2.7V 0.05 -0.25 DLE (LSB) DLE (LSB) LE (LSB) 0.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +2.7V (continued) At TA = 25°C, AVDD = +2.7V, and DAC loaded with midscale code, unless otherwise noted. DAC5311 8-BIT LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE (–40°C) 0.4 AVDD = 2.7V 0.01 AVDD = 2.7V 0 Zero-Code Error (mV) LE (LSB) 0.02 -0.01 -0.02 0.02 DLE (LSB) ZERO-CODE ERROR vs TEMPERATURE 0.01 0 0.3 0.2 0.1 -0.01 0 -40 -25 -10 -0.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +2.7V (continued) At TA = 25°C, AVDD = +2.7V, and DAC loaded with midscale code, unless otherwise noted. SOURCE CURRENT AT POSITIVE RAIL SINK CURRENT AT NEGATIVE RAIL 2.8 0.6 Analog Output Voltage (V) Analog Output Voltage (V) AVDD = 2.7V DAC Loaded with 000h 2.6 2.4 2.2 AVDD = 2.7V DAC Loaded with FFFh 2.0 0 2 0.4 0.2 0 4 6 8 10 0 2 4 ISOURCE (mA) Figure 57.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +2.7V (continued) At TA = 25°C, AVDD = +2.7V, and DAC loaded with midscale code, unless otherwise noted. TOTAL HARMONIC DISTORTION vs OUTPUT FREQUENCY SIGNAL-TO-NOISE RATIO vs OUTPUT FREQUENCY 94 -20 AVDD = 2.7V, fS = 225kSPS, -1dB FSR Digital Input, Measurement Bandwidth = 20kHz AVDD = 2.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 TYPICAL CHARACTERISTICS: AVDD = +2.7V (continued) At TA = 25°C, AVDD = +2.7V, and DAC loaded with midscale code, unless otherwise noted. VOUT (500mV/div) CLOCK FEEDTHROUGH 2.7V, 20MHz, MIDSCALE AVDD = 2.7V Clock Feedthrough Impulse ~0.4nV-s Time (5ms/div) Figure 66. Glitch Impulse < 0.3nV-s AVDD = 2.7V From Code: 800h To Code: 801h Clock Feedthrough ~0.4nV-s AVDD = 2.7V From Code: 801h To Code: 800h Clock Feedthrough ~0.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com TYPICAL CHARACTERISTICS: AVDD = +2.7V (continued) At TA = 25°C, AVDD = +2.7V, and DAC loaded with midscale code, unless otherwise noted. FULL-SCALE SETTLING TIME 2.7V RISING EDGE FULL-SCALE SETTLING TIME 2.7V FALLING EDGE AVDD = 2.7V From Code: 000h To Code: FFFh AVDD = 2.7V From Code: FFFh To Code: 000h Falling Edge 1V/div Rising Edge 1V/div Zoomed Rising Edge 100mV/div Zoomed Falling Edge 100mV/div Trigger Pulse 2.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 THEORY OF OPERATION DAC SECTION VREF The DAC5311, DAC6311, and DAC7311 are fabricated using TI's proprietary HPA07 process technology. The architecture consists of a string DAC followed by an output buffer amplifier. Because there is no reference input pin, the power supply (AVDD) acts as the reference. Figure 77 shows a block diagram of the DAC architecture.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com SERIAL INTERFACE the DACx311 compatible with high-speed DSPs. On the 16th falling edge of the serial clock, the last data bit is clocked in and the programmed function is executed. The DACx311 has a 3-wire serial interface (SYNC, SCLK, and DIN) compatible with SPI, QSPI, and Microwire interface standards, as well as most DSPs. See the Serial Write Operation timing diagram for an example of a typical write sequence.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 POWER-ON RESET TO ZERO-SCALE The DACx311 contains a power-on reset circuit that controls the output voltage during power-up. On power-up, the DAC register is filled with zeros and the output voltage is 0V. The DAC register remains that way until a valid write sequence is made to the DAC.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com APPLICATION INFORMATION USING THE REF5050 AS A POWER SUPPLY FOR THE DACx311 As a result of the extremely low supply current required by the DACx311, an alternative option is to use a REF5050 +5V precision voltage reference to supply the required voltage to the part, as shown in Figure 81. This option is especially useful if the power supply is too noisy or if the system supply voltages are at some value other than 5V.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 MICROPROCESSOR INTERFACING DACx311(1) Microwire DACx311 to 8051 Interface CS SYNC Figure 83 shows a serial interface between the DACx311 and a typical 8051-type microcontroller. The setup for the interface is as follows: TXD of the 8051 drives SCLK of the DACx311, while RXD drives the serial data line of the part. The SYNC signal is derived from a bit programmable pin on the port. In this case, port line P3.3 is used.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com LAYOUT A precision analog component requires careful layout, adequate bypassing, and clean, well-regulated power supplies. The DACx311 offers single-supply operation; it is often used in close proximity with digital logic, microcontrollers, microprocessors, and digital signal processors.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 PARAMETER DEFINITIONS With the increased complexity of many different specifications listed in product data sheets, this section summarizes selected specifications related to digital-to-analog converters. STATIC PERFORMANCE Static performance parameters are specifications such as differential nonlinearity (DNL) or integral nonlinearity (INL). These are dc specifications and provide information on the accuracy of the DAC.
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com Gain Temperature Coefficient Digital Feedthrough The gain temperature coefficient is defined as the change in gain error with changes in temperature. The gain temperature coefficient is expressed in ppm of FSR/°C. Digital feedthrough is defined as impulse seen at the output of the DAC from the digital inputs of the DAC. It is measured when the DAC output is not updated.
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DAC5311 DAC6311 DAC7311 www.ti.com SBAS442B – AUGUST 2008 – REVISED MAY 2013 Signal-to-Noise plus Distortion (SINAD) DAC Output Noise SINAD includes all the harmonic and outstanding spurious components in the definition of output noise power in addition to quantizing any internal random noise power. SINAD is expressed in dB at a specified input frequency and sampling rate, fS. DAC output noise is defined as any voltage deviation of DAC output from the desired value (within a particular frequency band).
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DAC5311 DAC6311 DAC7311 SBAS442B – AUGUST 2008 – REVISED MAY 2013 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (August 2011) to Revision B Page • Changed all 1.8V to 2.0V throughout data sheet ................................................................................................................. 1 • Deleted 1.8V Typical Characteristics section ...............................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-May-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
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PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing DAC5311IDCKR SC70 DCK 6 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 DAC5311IDCKT SC70 DCK 6 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 DAC6311IDCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC5311IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 DAC5311IDCKT SC70 DCK 6 250 180.0 180.0 18.0 DAC6311IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 DAC6311IDCKT SC70 DCK 6 250 180.0 180.0 18.0 DAC7311IDCKR SC70 DCK 6 3000 180.0 180.0 18.0 DAC7311IDCKT SC70 DCK 6 250 180.0 180.0 18.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.