Datasheet
DAC3484
SLAS749C –MARCH 2011–REVISED AUGUST 2012
www.ti.com
IOUT
FS
= (coarse_dac + 1)/16 x I
BIAS
x 64 = (coarse_dac + 1)/16 x (V
EXTIO
/ R
BIAS
) / 2 x 64
where V
EXTIO
is the voltage at terminal EXTIO. The bandgap reference voltage delivers an accurate voltage of
1.2V. This reference is active when extref_ena = ‘0’ in config27. An external decoupling capacitor C
EXT
of 0.1 µF
should be connected externally to terminal EXTIO for compensation. The bandgap reference can additionally be
used for external reference operation. In that case, an external buffer with high impedance input should be
applied in order to limit the bandgap load current to a maximum of 100 nA. The internal reference can be
disabled and overridden by an external reference by setting the extref_ena control bit. Capacitor C
EXT
may hence
be omitted. Terminal EXTIO thus serves as either input or output node.
The full-scale output current can be adjusted from 30 mA down to 10 mA by varying resistor R
BIAS
or changing
the externally applied reference voltage.
NOTE
With internal reference, the minimum Rbias resistor value is 1.28kΩ. Resistor value below
1.28kΩ is not recommended sice it will program the full-scale current to go above 30mA
and potentially damages the device.
DAC TRANSFER FUNCTION
The CMOS DACs consist of a segmented array of PMOS current sources, capable of sourcing a full-scale output
current up to 30 mA. Differential current switches direct the current to either one of the complementary output
nodes IOUTP or IOUTN. Complementary output currents enable differential operation, thus canceling out
common mode noise sources (digital feed-through, on-chip and PCB noise), dc offsets, even order distortion
components, and increasing signal output power by a factor of two.
The full-scale output current is set using external resistor R
BIAS
in combination with an on-chip bandgap voltage
reference source (+1.2 V) and control amplifier. Current I
BIAS
through resistor R
BIAS
is mirrored internally to
provide a maximum full-scale output current equal to 64 times I
BIAS
.
The relation between IOUTP and IOUTN can be expressed as:
IOUT
FS
= IOUTP + IOUTN
We will denote current flowing into a node as – current and current flowing out of a node as + current. Since the
output stage is a current source the current flows from the IOUTP and IOUTN pins. The output current flow in
each pin driving a resistive load can be expressed as:
IOUTP = IOUT
FS
x CODE / 65536
IOUTN = IOUT
FS
x (65535 – CODE) / 65536
where CODE is the decimal representation of the DAC data input word
For the case where IOUTP and IOUTN drive resistor loads R
L
directly, this translates into single ended voltages
at IOUTP and IOUTN:
VOUTP = IOUT1 x R
L
VOUTN = IOUT2 x R
L
Assuming that the data is full scale (65535 in offset binary notation) and the R
L
is 25 Ω, the differential voltage
between pins IOUTP and IOUTN can be expressed as:
VOUTP = 20mA x 25 Ω = 0.5 V
VOUTN = 0mA x 25 Ω = 0 V
VDIFF = VOUTP – VOUTN = 0.5V
Note that care should be taken not to exceed the compliance voltages at node IOUTP and IOUTN, which would
lead to increased signal distortion.
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