Datasheet
COP8SGE5, COP8SGE7, COP8SGH5
COP8SGK5, COP8SGR5, COP8SGR7
www.ti.com
SNOS516E –JANUARY 2000–REVISED APRIL 2013
WARNING
The SIO register should only be loaded when the SK clock is in the idle phase.
Loading the SIO register while the SK clock is in the active phase, will result in
undefined data in the SIO register.
Setting the BUSY flag when the input SK clock is in the active phase while in
the MICROWIRE/PLUS is in the slave mode may cause the current SK clock for
the SIO shift register to be narrow. For safety, the BUSY flag should only be set
when the input SK clock is in the idle phase.
MICROWIRE/PLUS Master Mode Operation
In the MICROWIRE/PLUS Master mode of operation the shift clock (SK) is generated internally. The
MICROWIRE Master always initiates all data exchanges. The MSEL bit in the CNTRL register must be set to
enable the SO and SK functions onto the G Port. The SO and SK pins must also be selected as outputs by
setting appropriate bits in the Port G configuration register. In the slave mode, the shift clock stops after 8 clock
pulses. Table 12 summarizes the bit settings required for Master mode of operation.
Figure 37. MICROWIRE/PLUS Application
MICROWIRE/PLUS Slave Mode Operation
In the MICROWIRE/PLUS Slave mode of operation the SK clock is generated by an external source. Setting the
MSEL bit in the CNTRL register enables the SO and SK functions onto the G Port. The SK pin must be selected
as an input and the SO pin is selected as an output pin by setting and resetting the appropriate bits in the Port G
configuration register. Table 12 summarizes the settings required to enter the Slave mode of operation.
Table 12. MICROWIRE/PLUS Mode Settings
(1)
G4 (SO) G5 (SK) G4 G5
Operation
Config. Bit Config. Bit Fun. Fun.
1 1 SO Int. MICROWIRE/PLUS
SK Master
0 1 TRI- Int. MICROWIRE/PLUS
STATE SK Master
1 0 SO Ext. MICROWIRE/PLUS
SK Slave
(1) This table assumes that the control flag MSEL is set.
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