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User's Guide

SCAU043–June 2010

Low-Additive Jitter, Four LVDS Outputs Clock Buffer

Evaluation Board

This user's guide describes how to use the CDCLVD1204/CDCLVD2102 evaluation module (EVM) and

provides users with guidelines to build their own systems. The EVM schematics and bill of materials are

included.

1 Features

Figure 1. CDCLVD1204/CDCLVD2102 Evaluation Board

• Easy-to-use evaluation board to fan out low-phase noise clocks

• Easy device setup

• Fast configuration

• Control pins configurable through jumpers

• Board powered at 2.5 V

• Single-ended or differential input clocks

• Device supports four LVDS outputs, EVM supports two LVDS outputs

2 General Description

The CDCLVD1204/CDCLVD2102 are high-performance, low-additive jitter clock buffers. They have two

universal input buffers that support single-ended or differential clock inputs and are selectable through a

control pin (for CDCLVD1204 only). The devices also feature on-chip bias generators that can provide the

LVDS common-mode voltage to the device inputs.

SCAU043–June 2010 Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board

Summary of content (7 pages)

PAGE 1
User's Guide SCAU043 – June 2010 Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board This user's guide describes how to use the CDCLVD1204/CDCLVD2102 evaluation module (EVM) and provides users with guidelines to build their own systems. The EVM schematics and bill of materials are included. 1 Features Figure 1.
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Signal Path and Control Circuitry www.ti.com The evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLV\D1204 or CDCLVD2102. This fully assembled and factory-tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well-controlled 50-Ω impedance microstrip transmission lines.
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The EVM Board Schematic www.ti.com Table 1. Output Control Table for CDCLVD2102 9 EN (Input 1) Clock Outputs 0 (GND) All outputs disabled (static "0") OPEN All outputs enabled 1 (VDD) OUT0, OUT1 enabled and OUT2, OUT3 disabled (static "0") The EVM Board Schematic Figure 2 and Figure 3 show the printed circuit board (PCB) schematics . Figure 2.
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The EVM Board Schematic www.ti.com Figure 3.
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Bill of Materials www.ti.com 10 Bill of Materials Table 2. Bill of Materials Qty Value Ref Des Footprint Part Category Manufacturer Manufacturer Part No 5 0.1 µF C1–C5 0402 Capacitors Venkel C0402X7R160-104KNE 4 0.1 µF C10–C13 0402 Capacitors Venkel C0402X7R160-104KNE 2 4.7 µF C8, C9 0402 Capacitors Taiyo Yuden AMK105BJ475MV-F 2 4.7 µF C6, C7 0805 Capacitors Murata Electronics North America GRM21BR71C475KA73L 1 10.0K R2 0402 Resistors Rohm MCR01MZPF1002 8 49.
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Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.