Datasheet

2
Functional Diagram
Logic Diagram
TRUTH TABLE
INPUT (A) OUTPUT (Y)
LH
HL
H= High Level
L= Low Level
1A
2A
4A
5A
6A
1
3
5
9
11
13
2
4
6
8
1Y
4Y
5Y
3Y
2Y
10
12
6Y
3A
GND = 7
V
CC
= 14
FIGURE 3. HYSTERESIS DEFINITION, CHARACTERISTIC, AND TEST SETUP
nA nY
V
O
V
H
V
T
-V
T
+
V
I
V
H
= V
T
+ - V
T
-
V
CC
V
I
GND
V
CC
V
O
GND
V
T
+V
T
-
V
H
CD54HC14, CD74HC14, CD54HCT14, CD74HCT14