3
FIGURE 1. FUNCTIONAL BLOCK DIAGRAM
4 x 16
DATA
REGISTER
4
5
6
7
D0
D1
D2
D3
13
12
11
10
Q0
Q1
Q2
Q3
1
THREE-STATE CONTROL
DATA-OUT READY (DOR)
2 CONTROL LOGIC
14
3 15
SHIFT OUT (
SO)
9
MASTER
RESET
(MR)
DATA-IN READY (DIR)
SHIFT IN (SI)
INPUT
BUFFERS
OUTPUT
BUFFERS
CD54HC40105, CD74HC40105, CD54HCT40105, CD74HCT40105
