Datasheet

2
Functional Diagram
TRUTH TABLE
INPUTS
DATA OUTPUT
MR CP
DATA ENABLE
E1 E2 D Q
n
HXXXXL
LLXXXQ
0
L ↑ HXXQ
0
L ↑ XHXQ
0
L ↑ LLLL
L ↑ LLHH
H= High Voltage Level
L = Low Voltage Level
X= Irrelevant
↑= Transition from Low to High Level
Q
0
= Level Before the Indicated Steady-State Input Conditions Were
Established
NOTE:
1. When either OE1 or OE2 (or both) is (are) high, the output is dis-
abled to the high-impedance state, however, sequential opera-
tion of the flip-flops is not affected.
3
4
Q
0
10
13
14
D1
D0
E2
E1
12
D2
11
D3
7
CP
OE1
2
MR
OE2
115
9
5
6
Q
3
Q
2
Q
1
CD54HC173, CD74HC173, CD54HCT173, CD74HCT173