Datasheet

11
10
9
6
A
B
C
INH
123 5 1 2 13
TG
TG
TG
TG
TG
TG
4
COMMON
OUT/IN
axaybxbycxcy
8
7
V V
SS EE
16
V
IN/OUT
DD
15
14
BINARY TO
1 OF 2
DECODERS
WITH
INHIBIT
LOGIC
LEVEL
CONVERSION
V
DD
COMMON
OUT/IN
COMMON
OUT/IN
ax OR ay
bx OR by
cx OR cy
1211 15 14
0123
3210
X CHANNELS IN/OUT
Y CHANNELS IN/OUT
BINARY
TO
1 OF 4
DECODER
WITH
INHIBIT
13
3
COMMON Y
OUT/IN
COMMON X
OUT/IN
78
16
6
9
10
A
B
INH
V V
V
SS EE
DD
TG
TG
TG
TG
TG
TG
TG
TG
4251
LOGIC
LEVEL
CONVERSION
16
CD4051B , CD4052B , CD4053B
SCHS047I –AUGUST 1998–REVISED SEPTEMBER 2017 www.ti.com
Product Folder Links: CD4051B CD4052B CD4053B
Submit Documentation Feedback Copyright © 1998–2017, Texas Instruments Incorporated
Functional Block Diagrams (continued)
All inputs are protected by standard CMOS protection network.
Figure 27. Functional Block Diagram, CD4052B
All inputs are protected by standard CMOS protection network.
Figure 28. Functional Block Diagram, CD4053B