Datasheet

9
Test Circuits and Waveforms
FIGURE 9. TYPICAL BIAS VOLTAGES
FIGURE 10. WAVEFORMS, CHANNEL BEING TURNED ON
(R
L
= 1kΩ)
FIGURE 11. WAVEFORMS, CHANNEL BEING TURNED OFF
(R
L
= 1kΩ)
FIGURE 12. OFF CHANNEL LEAKAGE CURRENT - ANY CHANNEL OFF
V
DD
= 5V
V
SS
= 0V
V
EE
= -7.5V
7
8
(B)
(C)
(D)
(A)
V
DD
= 7.5V
7.5V
1616 1616
7
8
7
8
V
DD
= 5V
V
DD
= 15V
V
SS
= 0V
V
EE
= 0V
7
8
5V
V
EE
= -10V
V
SS
= 0V V
SS
= 0V
5V
V
EE
= -5V
NOTE: The ADDRESS (digital-control inputs) and INHIBIT logic levels
are: “0” = V
SS
and “1” = V
DD
. The analog signal (through the TG) may
swing from V
EE
to V
DD
.
t
f
= 20ns
10%
10%
90%
50%
10%
50%
90%
10%
50%
90%
t
r
= 20ns
TURN-OFF TIME
TURN-ON TIME
t
f
= 20ns
10%
90%
50%
10%
50%
90%
10%
90%
t
r
= 20ns
TURN-OFF TIME
TURN-ON
t
PHZ
TIME
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
I
DD
I
DD
I
DD
V
DD
V
DD
CD4053
CD4052
CD4051
CD4051B, CD4052B, CD4053B