Datasheet

A1
R
G
A2
Clamp
Gain
Control
Bits
From
Attenuator
Clamp
Control
Bit
To
Low-Pass
Filter
PGA
VCM
(+1.65V)
ToADC
Inputs
CLAMP
LPF
AFE5804
www.ti.com
SBOS442C JUNE 2008REVISED OCTOBER 2011
PROGRAMMABLE POST-GAIN AMPLIFIER CLAMPING
(PGA)
To further optimize the overload recovery behavior of
Following the VCA is a programmable post-gain a complete TGC channel, the AFE5804 integrates a
amplifier (PGA). Figure 99 shows a simplified clamping stage, as shown in Figure 100. This
schematic of the PGA, including the clamping stage. clamping stage precedes the low-pass filter in order
The gain of this PGA can be configured to four to prevent the filter circuit from being driven into
different gain settings: 20dB, 25dB, 27dB, and 30dB, overload, the result of which would be an extended
programmable through the serial port; see Table 11. recovery time. The clamping level is fixed to clamp
the signal level to approximately 2.3V
PP
differential.
The PGA structure consists of a differential,
programmable-gain voltage-to-current converter
LOW-PASS FILTER
stage followed by transimpedance amplifiers to buffer
each side of the differential output. Low input noise is
The AFE5804 integrates an anti-aliasing filter in the
also a requirement for the PGA design as a result of
form of a programmable low-pass filter (LPF) for each
the large amount of signal attenuation that can be
channel. The LPF is designed as a differential, active,
applied in the preceding VCA stage. At minimum
second-order filter that approximates a Bessel
VCA attenuation (used for small input signals), the
characteristic, with typically 12dB per octave roll-off.
LNA noise dominates; at maximum VCA attenuation
Figure 100 shows the simplified schematic of half the
(large input signals), the attenuator and PGA noise
differential active low-pass filter. Programmable
dominates.
through the serial interface, the 3dB frequency
corner can be set to either 12.5MHz or 17MHz. The
filter bandwidth is set for all channels simultaneously.
Figure 99. Post-Gain Amplifier
(Simplified Schematic)
Figure 100. Clamping Stage and Low-Pass Filter (Simplified Schematic)
Copyright © 20082011, Texas Instruments Incorporated 49