Datasheet

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ADS8505
SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007
ELECTRICAL CHARACTERISTICS (continued)
T
A
= –40 ° C to 85 ° C, f
s
= 250 kHz, V
DIG
= V
ANA
= 5 V, using internal reference (unless otherwise noted)
ADS8505I ADS8505IB
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
DC ACCURACY
INL Integral linearity error –4 4 –1.5 1.5 LSB
(1)
DNL Differentiall linearity error –2 2 –1 1 LSB
(1)
No missing codes 15 16 Bits
Transition noise
(2)
0.77 0.77 LSB
Full-scale error
(3) (4)
Int. ref. –0.5 0.5 –0.25 0.25 %FSR
Full-scale error drift Int. ref. ± 7 ± 7 ppm/ ° C
Full-scale error
(3) (4)
Ext. 2.5-V ref. –0.25 0.25 –0.1 ± 0.01 0.1 %FSR
Full-scale error drift Ext. 2.5-V ref. ± 2 ± 2 ppm/ ° C
Bipolar zero error
(3)
–5 5 –2 2 mV
Bipolar zero error drift ± 0.4 ± 0.4 ppm/ ° C
Power supply sensitivity –8 8 –8 8
+4.75 V < V
D
< +5.25 V LSB
(V
DIG
= V
ANA
= V
D
)
AC ACCURACY
SFDR Spurious free dynamic range f
I
= 20 kHz 92 98 96 105 dB
(5)
THD Total harmonic distortion f
I
= 20 kHz –98 –92 –103 –96 dB
f
I
= 20 kHz 83 88 86 88 dB
SINAD Signal-to-(noise + distortion)
–60-dB Input 30 32 dB
SNR Signal-to-noise ratio f
I
= 20 kHz 83 88 86 88 dB
Full-power bandwidth
(6)
500 500 kHz
SAMPLING DYNAMICS
Aperture delay 5 5 ns
Transient response FS Step 2 2 µ s
Overvoltage recovery
(7)
150 150 ns
REFERENCE
Internal reference voltage 2.48 2.5 2.52 2.48 2.5 2.52 V
Internal reference source current (must
1 1 µ A
use external buffer)
Internal reference drift 8 8 ppm/ ° C
External reference voltage range for
2.3 2.5 2.7 2.3 2.5 2.7 V
specified linearity
External reference current drain Ext. 2.5-V ref. 100 100 µ A
DIGITAL INPUTS
Logic levels
V
IL
Low-level input voltage –0.3 0.8 –0.3 0.8 V
V
IH
High-level input voltage 2.0 V
DIG
+0.3 V 2.0 V
DIG
+0.3 V V
I
IL
Low-level input current ± 10 ± 10 µ A
I
IH
High-level input current ± 10 ± 10 µ A
DIGITAL OUTPUTS
Data format (parallel 16-bits)
Data coding (binary 2's complement)
V
OL
Low-level output voltage I
SINK
= 1.6 mA 0.4 0.4 V
V
OH
High-level output voltage I
SOURCE
= 500 mA 4 4 V
Hi-Z state,
Leakage current ± 5 ± 5 µ A
V
OUT
= 0 V to V
DIG
Output capacitance Hi-Z state 15 15 pF
(1) LSB means least significant bit. For the 16-bit, ± 10-V input ADS8505, one LSB is 305 µ V.
(2) Typical rms noise at worst case transitions and temperatures.
(3) As measured with fixed resistors shown in Figure 27 . Adjustable to zero with external potentiometer.
(4) Full-scale error is the worst case of –full-scale or +full-scale deviation from ideal first and last code transitions, divided by the transition
voltage (not divided by the full-scale range) and includes the effect of offset error.
(5) All specifications in dB are referred to a full-scale ± 10-V input.
(6) Full-power bandwidth is defined as the full-scale input frequency at which signal-to-(noise + distortion) degrades to 60 dB, or 10 bits of
accuracy.
(7) Recovers to specified performance after 2 x FS input overvoltage.
3
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