Datasheet

5020 100 150 200
In ueput F eqr ncy (MHz)
SamplingFrequency(MSPS)
SFDR(dBc)
250 300 350 400
30
70
40
50
60
80
125
80757065 85
55
20
90
100
110
120
84
87
87
87
87
87
84
84
84
84
84
84
84
84
81
81
81
78
78
78
75
75
75
71
71
71
75
67
67
67
63
63
63
59
55
60
5020 100 150 200
In ueput F eqr ncy (MHz)
SamplingFrequency(MSPS)
SFDR(dBc)
250 300 350 400
30
70
40
50
60
80
125
80757065 85
90
20
90
100
110
120
60
87
87
87
87
87
87
87
87
87
87
90
90
84
84
84
81
81
81
77
77
77
73
73
73
69
69
69
65
61
ADS4122, ADS4125
ADS4142, ADS4145
www.ti.com SBAS520A –FEBRUARY 2011– REVISED MARCH 2011
TYPICAL CHARACTERISTICS: CONTOUR
At +25°C, AVDD = 1.8V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock, 1.5V
PP
differential clock
amplitude, 50% clock duty cycle, –1dBFS differential analog input, 0dB gain, low-latency mode, DDR LVDS output interface,
and 32k-point FFT, unless otherwise noted.
SFDR ACROSS INPUT AND SAMPLING FREQUENCIES (0dB Gain)
Figure 95.
SFDR ACROSS INPUT AND SAMPLING FREQUENCIES (6dB Gain)
Figure 96.
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