Information

88 | Signal Chain Guide 2013 Texas Instruments
Clocks and Timing
Clock Distribution (Fanout Buffers, Zero-Delay Buffers)
Differential Clock Buffer with Dividers
CDCUN1208LP
Key Features
• Lowpowerconsumptionandpower
management features including 1.8 V
operation and output enable control
• Integratedvoltageregulatorsimprove
PSNR
• SupportsPCIEgen1,gen2,gen3
• Built-individer
• Excellentadditivejitterperformance
200 fs RMS (10 kHz-20 MHz),
LVDS at 100 MHz
•
Maximumoperatingfrequency:
Differential mode: up to 400 MHz
LVCMOS mode: up to 250 MHz
• ESDprotectionexceeds2kVHBM,
500 V CDM
• Industrialtemperaturerange
(–40°C to 85°C)
•
Widesupplyrange
(1.8 V, 2.5 V, or 3.3 V)
Applications
• Communicationssystems
(Ethernet, PCI Express
®
)
• Computingsystems
(Ethernet, PCIe, USB)
•
Consumer(settopboxes,
video equipment)
•
Officeautomation
The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range,
two universal differential/single-ended inputs, and universal outputs (HCSL, LVDS, or
LVCMOS) with edge rate control. The state of certain pins determines device configu-
ration at power up. Alternately, the CDCUN1208LP provides a SPI/I2C port with which
a host pr
ocessor controls device settings. The output section includes four dedi-
cated supply pins enabling the operation of output ports from different power supply
domains. This pr
ovides the ability to clock devices switching at different LVCMOS
levels without the need for external logic level translation circuitry.
The CDCUN1208LP delivers excellent additive jitter performance and low power
consumption;itisofferedina32-pinQFNpackagereducingthesolutionfootprint,is
flexible and easy to use.
CDCUN1208LP functional block diagrams
LVDS
P
LVDS
N
LVDS
P
LVDS
N
LVDS
P
LVDS
N
LVDS
P
LVDS
N
CDCUN1208LP
HCSL
P
/1,/2,/4,/8
XUMNI
HCSL
N
HCSL
P
HCSL
N
HCSL
P
HCSL
N
HCSL
P
HCSL
N
OE
OTTP
ERC
LVCMOS
HCSL
LVDS
NC
V
DD
HCSL
P
HCSL
N
HCSL
P
HCSL
N
HCSL
P
HCSL
N
HCSL
P
HCSL
N
CDCUN1208LP
OE
ERC
LVDS
P
LVDS
N
LVDS
P
LVDS
N
LVDS
P
LVDS
N
LVDS
P
LVDS
N
OTTP
LVCMOS
HCSL
LVDS
V
DD
DIVIDE
IN2P
IN1P
INSEL
IN1N
IN2N
MODE
NC
/1,/2,/4,/8
DIVIDE
IN2P
IN1P
IN1N
IN2N
MODE
NC
ITTP
LVCMOS
HCSL
LVDS
NC
V
DD INSEL
ITTP
LVCMOS
NC
V
DD
XUMNI
Get more information: www.ti.com/product/CDCUN1208LP