Datasheet

Converting
START
DOUT/DRDY
SCLK
DRDY
ADS1146/7/8
Status
Shutdown
1 2 3 16
t
CONV
t
START
ADS1146
ADS1147
ADS1148
www.ti.com SBAS453F –JULY 2009–REVISED APRIL 2012
ADC CONTROL down to save power. During shutdown, the
conversion result can be retrieved; however, START
ADC Conversion Control must be taken high before communicating with the
configuration registers. The device stays shut down
The START pin provides easy and precise control of
until the START pin is once again taken high to begin
conversions. Pulse the START pin high to begin a
a new conversion. When the START pin is taken
conversion, as shown in Figure 35 and Table 11. The
back high again, the decimation filter is held in a
conversion completion is indicated by the
reset state for 32 modulator clock cycles internally to
DOUT/DRDY pin going low. When the conversion
allow the analog circuits to settle.
completes, the ADS1146/7/8 automatically shuts
Figure 35. Timing for Single Conversion Using START Pin
Table 11. START Pin Conversion Times for Figure 35
SYMBOL DESCRIPTION DATA RATE (SPS) VALUE UNIT
5 200.295 ms
10 100.644 ms
20 50.825 ms
40 25.169 ms
80 12.716 ms
Time from START pulse to DRDY and
t
CONV
DOUT/DRDY going low
160 6.489 ms
320 3.247 ms
640 1.692 ms
1000 1.138 ms
2000 0.575 ms
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