Information

116 | Signal Chain Guide 2013 Texas Instruments
Interface
SerDes – Automotive
Automotive SerDes
Device -
Serializer
Device -
Deserializer
Color
Depth
Pixel Clock
Range
(MHz)
External
Interface EMI Mitigation
Signal
Conditioning
- SER
Signal
Conditioning
- DES Diagnostics
Special
Features Package Price*
FPD-Link III (AECQ)
DS90UH925Q DS90UH926Q 24 bpp 5-85 LVCMOS Coding, SSCG De-E Adapt. EQ BIST, TPG
HDCP, I
2
S
Audio
LLP-48/LLP-60 TBD
DS90UB925Q DS90UB926Q 24 bpp 5-85 LVCMOS Coding, SSCG De-E Adapt. EQ BIST, TPG Dithering LLP-48/LLP-60 TBD
DS90UB913Q DS90UB914Q 10/12 bpp 10-100 LVCMOS Coding, SSCG — Adapt. EQ BIST Jitter Tolerant LLP-32/LLP-48 TBD
DS90UB903Q DS90UB904Q 18 bpp 10-43 LVCMOS Coding, SSCG — EQ BIST — LLP-40/LLP-48 5.85
DS90UB901Q DS90UB902Q 14 bpp 10-43 LVCMOS Coding, SSCG — EQ BIST CRC LLP-32/LLP-40 5.61
FPD-Link II (AECQ)
DS90UR907Q DS90UR908Q 24 bpp 5-65 LVDS
PTO, SSCG,
LVDS
De-E EQ BIST — LLP-36/LLP-48 8.25
DS90UR905Q DS90UR906Q 24 bpp 5-65 LVCMOS
PTO, SSCG,
Slew
De-E EQ BIST — LLP-48/LLP-60 7.50
DS90UR903Q DS90UR904Q 18 bpp 10-43 LVCMOS Coding, SSCG — EQ BIST — LLP-40/LLP-48 TBD
DS99R421Q DS99R124Q 18 bpp 5-43 LVCMOS LVDS — — BIST — LLP-36/LLP-48 6.15
DS90UR241Q DS90UR124Q 18 bpp 5-43 LVCMOS PTO, Slew Pre-E — BIST — TQFP-48/TQFP-64 5.30
DS90C241Q DS90C124Q 18 bpp 5-35 LVCMOS PTO, Slew Pre-E — — — TQFP-48/TQFP-48 5.20
*Suggested resale price in U.S. dollars in quantities of 1,000. New products are listed in bold red.
Device -
Serializer
Device -
Deserializer
Color
Depth
Pixel Clock
Range (MHz)
External
Interface
CLK
Edge Description
Serial
Channels Package Price*
FlatLink
TM
/FPD-Link I (AECQ)
DS90CF384AQ
—
24 bpp 20-65 LVCMOS Falling 28 Bit Des Supports 24 bpp + 4 control 4D+C TSSOP-56 2.57
DS90CR286AQ — 24 bpp 20-66 LVCMOS Rising 28 Bit Des Supports 24 bpp + 3 control + 1 GP 4D+C TSSOP-56 4.76
SN65LVDS86A-Q1 — 18 bpp 32-68 LVCMOS Falling 21 Bit Des Supports 18 bpp + 3 control 3D+C TSSOP-48 2.80
SN65LVDS84AQ-Q1 — 18 bpp 31-75 LVCMOS Falling 21 Bit Ser Supports 18 bpp + 3 control 3D+C TSSOP-48 2.75
Get more information: www.ti.com/product/DS90UB925Q-Q1
www.ti.com/product/DS90UB926Q-Q1
24-Bit Color FPD-Link III Deserializers with Bidirectional Control Channel
DS90UB925Q-Q1, DS90UB926Q-Q1
TheDS90UB926Qdeserializer,inconjunctionwiththeDS90UB925Qserializer,provides
a complete digital interface for concurrent transmission of high-speed video, audio, and
control data for automotive display and image sensing applications.
This chipset translates a parallel
RGB video interface into a single
pair high-speed serialized interface.
The serial bus scheme, FPD-Link III,
supports full duplex of high speed
forward data transmission and low
speed backchannel communica
-
tion over a single differential link.
Consolidation of video data and
contr
ol over a single differential pair
reduces the interconnect size and
weight, while also eliminating skew
issues and simplifying
system design.
DS90UB925/6 functional block diagram
Key Features
• Bidirectionalcontrolinterfacechannel
interface with I
2
C
• compatibleserialcontrolbus
• Supportshighdefinition(720p)digital
video format
• RGB888+VS,HS,DEandsynchro
-
nized I
2
S audio supported
• 5to85MHzPCLKsupported
• Single3.3Voperationwith1.8Vor
3.3 V compatible LVCMOS I/O interface
•
AC-coupledSTPInterconnectupto
10 meters
•
ParallelLVCMOSvideooutputs
• Lowpowermodesminimizepower
dissipation
• Automotivegradeproduct:AEC-Q100
Grade 2 qualified
Applications
• Automotivedisplayfornavigation
• Rearseatentertainmentsystems
• Automotivedriveassistance
• Automotivemegapixelcamerasystems
RIN-
RIN+
Clock and
Data
Recovery
Timing and
Control
24
LOCK
PCLK
SSCG
PASS
ROUT [23:0]
HS
VS
DE
Error
Detector
PDB
BISTEN
BISTC
CMF
SCL
SCA
IDx
4
I2S_CLK
I2S_WC
I2S_DA
MCLK
CMLOUTP
CMLOUTN
MODE_SEL
DS90UB926Q Deserializer
Output Latch
Serializer to Parallel
DC Balance Decoder
Regulator