Datasheet

V
IN
SCL
SDA
V
A
ADC121C021
0.1 PF
GND
4.7 PF
22:
INPUT
470 pF
ALERT
5 k:
R
P
R
P
Regulated Supply
V
DD
Controller
SCL
SDA
INTERRUPT
I
2
C BUS ...
ADC121C021, ADC121C021Q, ADC121C027
www.ti.com SNAS415F –JANUARY 2008–REVISED MARCH 2013
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
A typical application circuit is shown in Figure 36. The analog supply is bypassed with a capacitor network
located close to the ADC121C021. The ADC uses the analog supply (V
A
) as its reference voltage, so it is very
important that V
A
be kept as clean as possible. Due to the low power requirements of the ADC121C021, it is
possible to use a precision reference as a power supply.
The bus pull-up resistors (R
P
) should be powered by the controller's supply. It is important that the pull-up
resistors are pulled to the same voltage potential as V
A
. This will ensure that the logic levels of all devices on the
bus are compatible. If the controller's supply is noisy, an appropriate bypass capacitor should be added between
the controller's supply pin and the pull-up resistors. For Hs-mode applications, this bypass capacitance will
improve the accuracy of the ADC.
The value of the pull-up resistors (R
P
) depends upon the characteristics of each particular I
2
C bus. The I
2
C
specification describes how to choose an appropriate value. As a general rule-of-thumb, we suggest using a 1kΩ
resistor for Hs-mode bus configurations and a 5kΩ resistor for Standard or Fast Mode bus configurations.
Depending upon the bus capacitance, these values may or may not be sufficient to meet the timing requirements
of the I
2
C bus specification. Please see the I
2
C specification for further information.
Figure 36. Typical Application Circuit
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