Datasheet
Functional overview STM32F765xx STM32F767xx STM32F768Ax STM32F769xx
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– Refreshed by software
• DMA capability to read the final conversion data
• Interrupts: end of conversion, overrun, analog watchdog, short circuit, input serial
channel clock absence
• “regular” or “injected” conversions:
– “regular” conversions can be requested at any time or even in continuous mode
without having any impact on the timing of “injected” conversions
– “injected” conversions for precise timing and with high conversion priority
Table 9. DFSDM implementation
DFSDM features DFSDM1
Number of filters: x (DFSDM_FLTx) 4
Number of input transceivers/channels: y (DFSDM_CHy) 8
Internal ADC parallel input support -
Number of external triggers (JEXTSEL size) 32
ID register support -
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