Datasheet
DocID029041 Rev 6 157/255
STM32F765xx STM32F767xx STM32F768Ax STM32F769xx Electrical characteristics
220
Static latchup
Two complementary static tests are required on six parts to assess the latchup
performance:
• A supply overvoltage is applied to each power supply pin
• A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latchup standard.
5.3.19 I/O current injection characteristics
As a general rule, a current injection to the I/O pins, due to external voltage below V
SS
or
above V
DD
(for standard, 3 V-capable I/O pins) should be avoided during the normal product
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when an abnormal injection accidentally happens, susceptibility tests are performed
on a sample basis during the device characterization.
Functional susceptibilty to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (>5
LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out of –
5
µA/+0 µA range), or other functional failure (for example reset, oscillator frequency
deviation).
A negative induced leakage current is caused by negative injection and positive induced
leakage current by positive injection.
The test results are given in Table 65.
Table 63. ESD absolute maximum ratings
Symbol Ratings Conditions Class
Maximum
value
(1)
Unit
V
ESD(HBM)
Electrostatic discharge
voltage (human body
model)
T
A
= +25 °C conforming to ANSI/ESDA/JEDEC
JS-001-2012
2 2000
V
V
ESD(CDM)
Electrostatic discharge
voltage (charge device
model)
T
A
= +25 °C conforming to ANSI/ESD S5.3.1-
2009, all packages except TFBGA100
3250
T
A
= +25 °C conforming to ANSI/ESD S5.3.1-
2009, TFBGA100 package
4500
1. Guaranteed by characterization results.
Table 64. Electrical sensitivities
Symbol Parameter Conditions Class
LU Static latch-up class T
A
= +105 °C conforming to JESD78A II level A
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