Datasheet
Electrical characteristics STM32F413xG/H
156/208 DocID029162 Rev 6
t
wh(CKIN)
t
wl(CKIN)
Input clock high
and low time
SPI mode
(SITP[1:0] = 01),
External clock mode
(SPICKSEL[1:0] = 0)
1.71 < V
DD
< 3.6 V
t
CKIN
/ 2 - 0.5 t
CKIN
/ 2 -
ns
t
su
Data input
setup time
SPI mode
(SITP[1:0]=01),
External clock mode
(SPICKSEL[1:0] = 0)
1.71 < V
DD
< 3.6 V
3.5 - -
t
h
Data input hold
time
SPI mode
(SITP[1:0]=01),
External clock mode
(SPICKSEL[1:0] = 0)
1.71 < V
DD
< 3.6 V
2.5 - -
T
Manchester
Manchester
data period
(recovered
clock period)
Manchester mode
(SITP[1:0] = 10 or 11),
Internal clock mode
(SPICKSEL[1:0] ≠ 0)
1.71 < V
DD
< 3.6 V
(CKOUTDIV + 1)
* t
DFBDMCLK
-
(2 * CKOUTDIV
) * t
DFBDMCLK
1. Data based on characterization results.
Table 87. DFSDM characteristics
(1)
(continued)
Symbol Parameter Conditions Min Typ Max Unit
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