Data Sheet

深圳市飞易通科技有限公司
www.feasycom.com
FSC-BT826
Figure 14: FSC-BT826 Restricted Area
Following recommendations helps to avoid EMC problems arising in the design. Note that each
design is unique and the following list do not consider all basic design rules such as avoiding capacitive
coupling between signal lines. Following list is aimed to avoid EMC problems caused by RF part of the
module. Use good consideration to avoid problems arising from digital signals in the design.
Ensure that signal lines have return paths as short as possible. For example if a signal goes to an
inner layer through a via, always use ground vias around it. Locate them tightly and symmetrically
around the signal vias. Routing of any sensitive signals should be done in the inner layers of the PCB.
Sensitive traces should have a ground area above and under the line. If this is not possible, make sure
that the return path is short by other means (for example using a ground line next to the signal line