Service manual
CD-MD3000H/CD-MD3000W
– 102 –
IC1201 VHiLR37814/-1: Endec/Atrac (LR37814)
Figure 102-2 BLOCK DIAGRAM OF IC
Figure 102-1 BLOCK DIAGRAM OF IC
IC1101 VHiiR3R58M/-1:RF Signal Processor (IR3R58M)
MODE
SW
BPF
BIAS
ADIP AGC
DIFF
RESISTOR & SW
EFM AGC
RF1
RF2
RF3
RF4
REFI
REFO
AOUT
ASW
AIN
BIN
BSW
BOUT
2-1
ADAGI
ADAGC
ADIPNF
ADIPO
GND2
WBO
VCC2
OPICPW
DISC
SGAIN
DTEMP
1234
1+2
PIN
3+4
PITG
NIN
GND1
BIAS
VCC1
EFMAGC
DCNF
EFMO
EOUT
ESW
EIN
FIN
FSW
FOUT
EOUT
BOUT
AOUT
TCGO
TCGI
RFADD
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
TOTMON
TEMCN
SBCK
SBO
SBSY
SFSY
FCK
SENSE
COUT
MCCK
DINIX
VDD2
DGND
RSTX
SYD0
SYD1
SYD2
SYD3
SYD4
SYD5
SYD6
SYD7
SYWRX
SYRDX
SYRS
EFMO
PLCK
ACRCEF
RAA11
RAD0
RAD1
RAWEX
RARASX
RAA9
RAD3
RAD2
RACASX
DGND
RACEX
RAA8
RAA7
RAA6
RAA5
RAA4
VDD2
RAA10
RAA0
RAA1
RAA2
RAA3
EFMMON
AVCC1
EFM1
AGND1
AVCC2
VREF
WBI
TCG
AIN
BIN
EIN
FIN
VBAT
VDD1
DGND
TEST2
X176KO
FODRF
FODRR
TRDRF
TRDRR
SLDRF
SLDRR
SPDRF
SPDRR
FEMON
DADATA
ADDATA
DFCK
BCLK
LRCK
DGND
PLLBVC
DOUT
DIN
XO
XI
DGND
VDD1
VPO
VXI
CDBCLK
CDLRCK
CDDATA
DIN2
DILOCK
TEST1
TEST0
TCRS
X700KO
LR37814
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10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51