User's Manual

RYZ012 Multi-Standard Wireless Communication Module for Bluetooth 5 Low Energy and 802.15.4
R15UH0002EU0103 Rev.1.03 Page 90 of 206
Apr.21.21
8.1 Register Reference
8.1.1 UART:DATA - UART Data Buffer
Address: 0x0090
Reset: 0x00000000
7
6
5
4
3
2
1
0
UART:DATA[3]
DAT3
rw, 0
UART:DATA[2]
DAT2
rw, 0
UART:DATA[1]
DAT1
rw, 0
UART:DATA[0]
DAT0
rw, 0
7:0, 15:8,
23:16, 31:24
DATx
UART Data Buffer
Read/Write Data buffer to corresponding byte
8.1.2 UART:CLKDIV - UART Clock Divider Configuration
Address: 0x0094
Reset: 0x0fff
7
6
5
4
3
2
1
0
UART:CLKDIV[1]
DIVEN
DIV
rw, 0
rw, 15
UART:CLKDIV[0]
DIV
rw, 255
15
DIVEN
Enable UART clock divider
0: Disables clock divider
1: Enables clock divider
14:0
DIV
Clock divider
F
UART
= F
SYS
/ ( DIV + 1 )