User's Manual

16 SPARC/CPU−56T
Abbreviation Description
F
FAE
F
Field Application Engineers
FIFO First In First Out
FPGA Field−Programmable Gate Array
I
IBMU
I
Intelligent Board Management Unit
ICMB Intelligent Chassis Management Bus
ICT In−Circuit Test
IDE Integrated Drive Electronics
IEC International Electric Code
IOBP Input Output Back Panel
IOM I/O Memory Management Unit
IPMB Intelligent Platform Management Bus
IPMI Intelligent Platform Management Interface
ISO International Organization for Standardization
J
JTAG
J
Joint Test Access Group
L
LCA
L
Load Controller Assembly
LDO Local Data Output
LED Light Emitting Diode
LVD Low Voltage Differential
LVTTL Low Voltage Transistor Transistor Logic
M
MAC
M
Media Access Control Layer
MCU Memory Control Unit
MII Media Independent Interface
N
NEBS
N
Network Equipment Building Standards
NMI Nonmaskable Interrupt
NVRAM Nonvolatile Random Access Memory
O
OBDIAG
O
OpenBoot Diagnostics
P
PBM
P
PCI Bus Module
PCB Printed Circuit Board
PCI
Peripheral Component Interconnect