Datasheet

NXP Semiconductors
PBSS4260PANP
60 V, 2 A NPN/PNP low VCEsat (BISS) transistor
PBSS4260PANP All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved
Product data sheet 12 December 2012 5 / 21
Symbol Parameter Conditions Min Typ Max Unit
Per device
[1] - - 245 K/W
[2] - - 160 K/W
[3] - - 171 K/W
[4] - - 130 K/W
[5] - - 202 K/W
[6] - - 120 K/W
[7] - - 130 K/W
R
th(j-a)
thermal resistance
from junction to
ambient
in free air
[8] - - 63 K/W
[1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for
collector 1 cm
2
.
[3] Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
[4]
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm
2
.
[5] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
[6] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for
collector 1 cm
2
.
[7] Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
[8]
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm
2
.
006aad166
10
-5
1010
-2
10
-4
10
2
10
-1
t
p
(s)
10
-3
10
3
1
10
2
10
10
3
Z
th(j-a)
(K/W)
1
duty cycle = 1
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
0
FR4 PCB 35 µm, standard footprint
Fig. 2. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values