JN-RM-2078 JN5189, 89T, 88, 88T modules development reference manual Rev. 1.6 — April 15, 2019 Reference manual dDocument information Info Content Keywords JN5189, 89T, 88, 88T, module Abstract Reference Manual for JN5189, 89T, 88, 88T modules and platform design.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual Revision history Rev Date Description 1.0 20180201 Creation 1.1 20180307 Added picture of the JN5189-001-M16 module 1.2 20180525 Manufacturer address added 1.3 20180528 Update of IC chapter 1.4 20181004 Update of FCCID / IC ID 1.5 20180321 JN5188/88T added Temperature range explained O-QPSK modulation frequency band added 1.6 20190415 Add comments in chapter 8.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 1. Introduction This manual describes the hardware for the reference designs for modules based around the NXP JN5189 family of wireless microcontrollers. This family is composed by JN5189, 89T, 88, 88T modules. In this manual, JN5189 name can stand also for JN5189T, JN5188 and JN5188T.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual The high power JN5189-001-M16 is not approved for use in Europe. It is compliant with: CFR 47 FCC part 15 Industry Canada requirements 2. Reference Design The reference design package includes the following information for each module variant: Reference manual: JN-RM-2078 Schematics Layout Bill-of-Materials Full design databases including schematics and layout source files are available on request.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual Table 2. Operating conditions 3. Block diagram Printed antenna µFl connector Matching JN5189 Matching JN5189-001-M10 JN5189 JN5189-001-M13 SECURITY STATUS Fig 1. JN5189-001-M10 & M13 block diagrams Printed antenna SKY66403 Matching JN5189 µFl connector JN5189-001-M16 Fig 2.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 4. Marking The label is fixed on the bottom face of the modules 5. Design considerations To have successful wireless hardware development, the proper device footprint, RF layout, circuit matching, antenna design, and RF measurement capability are essential. RF circuit design, layout, and antenna design are specialties requiring investment in tools and experience.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 32 MHz XTAL RFIO & Matching Network FEM SKY66403 IF Printed antenna DCDC external components Fig 4. 32 kHz XTAL µFl connector JN5189-001-M16 The device footprint and layout are critical and the RF performance is affected by the design implementation. For these reasons, use of the NXP recommended RF hardware reference designs are important for successful board performance.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual RFIO GND vias Die flag Fig 5. Critical Layout of die flag area SECURITY STATUS Figure 5 shows the critical areas of the device die flag. These are the following: • Ground vias and locations • RF output and ground traces • Die flag shape 5.2 PCB Stack-Up Complexity is the main factor that will determine whether the design of an application board can be two-layer, four-layer, or more.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual The JN5789-001-M10 and JN5189-001-M13 (OM15069) and JN5189-001-M16 (OM15062) modules are built on a standard 4–layer printed circuit board (PCB) with the individual layers organized as shown in Figure 6. Fig 6. PCB stack-up Note: The NXP PCB layouts assume use of the layers defined above. If a different PCB stack-up is used then NXP does not guarantee performance.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual While no special measures are required for the board design, it is recommended that Class 1 tolerances be used. 5.3 RF circuit topology and matching NXP always recommends that designers start by copying the existing NXP reference design. This applies to both the circuit portion (schematic) of the design, and the PCB layout. For all RF designs, particularly for designs at frequencies as high as 2.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual the first shunt capacitor. These elements transform the device impedance to 50 ohms. The value of these components may vary depending on your specific board layout. The recommended RF matching network is shown in Figure 7. Avoid routing traces near or parallel to RF transmission lines or crystal signals.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual SECURITY STATUS Fig 8. RF Plots for 3pF ceramic capacitor Murata GRM1555 type The same is true of inductors. There is parasitic capacitance in an inductor, mainly due to capacitive coupling between the turns of wire. At some point in frequency, this capacitance will have a higher impedance than the inductance of the part. From this frequency and higher the part acts as a capacitor and not as an inductor.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual Ground pours or fingers can act as antennas that unintentionally radiate. To avoid this, eliminate any finger that is not connected to the ground reference with a via; put a via in any trace that doesn’t go anywhere. 5.7 Layers interconnections Avoid vias in the RF traces.Typically for a 1.6mm thickness PCB material, a single via can add 1.2nH of inductance and 0.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual timer counters. Thus, it is important that the crystal reference is specified and built correctly to ensure that the system functions properly. The choice of crystal resonator is important for the following reasons: Resonator tolerance: A number of parameters, ranging from on-chip timings to radio centre-frequency, are derived directly from the tolerance of the crystal.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual Fig 10. GND vias placement The capacitor with a smaller capacitance must be placed nearer to the IC.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual VDDE Fig 13. FB and VDD_PMU decoupling SECURITY STATUS C100 C10 C1 C12 Fig 14. VDDE decoupling Fig 15. VBAT decoupling 5.11 Traces Isolation When PCB traces are in close proximity, they can talk to each other through the capacitor created by these traces. JN-RM-2078 Reference manual All information provided in this document is subject to legal disclaimers. Rev. 1.6 — April 15, 2019 © NXP Semiconductors N.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual In order to mimimize the effect of this parasitic coupling, identify the most sensitive traces or areas (RF trace, oscillator, power lines, ...) and separate them from any signal that is likely to couple with them through parasitics. Separation between 2 lines can be achieved by increasing the distance from one to the other. 5.12 GPIOs The GPIOs traces are generally long lines that can cover long distances.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 6. Optimal PCB placement of a module In case the JN5189 is mounted on a module similar to the NXP JN5189-001-M10 care must be taken when mounting this module onto another PCB. The area around the antenna must be kept clear of conductors or other metal objects for an absolute minimum of 20 mm. This is true for all layers of the PCB and not just the top layer.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual The decal is shown in Fig 17. The pad stacks used are 0.25 mm by 1 mm for the smaller pads, and a 6.4 mm square pad for the paddle. SECURITY STATUS Fig 17. Recommended PCB decal for HVQFN40 40-pin QFN The solder mask used is shown in Fig 18. The pad stacks used are 0.25 mm by 1 mm for the smaller pads, and four 1.6 mm square pads to apply paste to the paddle. The solder paste mask has a thickness of 6-thou (0.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual Fig 18. Solder paste mask for HVQFN40 40-pin QFN SECURITY STATUS Fig 19. Vias on the paddle of the HVQFN40 40-pin QFN 25 vias are applied to the paddle. These allow excess solder paste and heated air to be vented away from the device, preventing the device from being lifted during soldering. In addition, these vias ensure that a low impedance ground is maintained, which is vital for optimum RF performance.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 8. Regulations 8.1 Federal Communication Commission Statement • This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules see Ref. 4. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual This module has been designed to operate with antennas having a maximum gain of 2 dBi. Antennas having a gain greater than 2 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. 8.1.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual power supply system) still needs to re-confirm that the whole system complies with both intentional and unintentional emission requirements. This device complies with Industry Canada RF radiation exposure limits set forth for general population.
Check number 1 1.1 1.2 1.4 1.5 1.6 1.7 2 2.1 2.2 3 24 of 33 © NXP B.V. 2016. All rights reserved. 3.1 3.2 GENERAL Have the schematics been checked versus NXP reference schematics & Application Notes? Have the schematics been reviewed by several people? Does the application use non standard components? (e.g.
4 4.1 4.2 5 5.1 5.2 5.3 5.4 5.5 6.1 6.2 7 7.1 JN-RM-2078 25 of 33 © NXP B.V. 2016. All rights reserved. 5.6 6 JN5189, 89T, 88, 88T modules development reference manual Rev. 1.6 — April 15, 2019 All information provided in this document is subject to legal disclaimers. 4.3 NXP Semiconductors JN-RM-2078 Reference manual 3.
8.1 8.2 8.3 8.4 8.6 9 9.1 9.2 JN-RM-2078 26 of 33 © NXP B.V. 2016. All rights reserved. JN5189, 89T, 88, 88T modules development reference manual Rev. 1.6 — April 15, 2019 All information provided in this document is subject to legal disclaimers. 8.
Layout design-in check list 1 1.1 GENERAL Has the number of layers been clearly discussed? Has the layout been checked versus NXP reference board ? (i.e OM15069-2_JN5189_ANTENNA_MODULE) Have the HW recommendations of the JN-RM-2078 reference manual been followed? Has the correct PCB material been specified? Have the correct PCB thicknesses been specified? RF IO Is the RF_IO input/output line well sized for 50 ohm? The line width must be calculated according to the board thickness and PCB material.
4.4 4.5 4.6 4.7 5 5.1 5.3 5.4 5.5 5.6 5.7 5.8 28 of 33 © NXP B.V. 2016. All rights reserved. 5.10 5.11 5.12 JN-RM-2078 5.9 JN5189, 89T, 88, 88T modules development reference manual Rev. 1.6 — April 15, 2019 All information provided in this document is subject to legal disclaimers. 5.2 NXP Semiconductors JN-RM-2078 Reference manual 4.3 For low supply voltage application – close to 2.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 11. Abbreviations Table 5. Abbreviations Acronym Description EMC Electro Magnetic Compatibility ETSI European Telecommunications Standards Institute FCC Federal Communications Commission PAN Personal Area Network PCB Printed Circuit Board RF Radio Frequency SPI-bus Serial Peripheral Interface-bus TQFN Thin Quad Flat No-lead WPAN Wireless Personal Area Network 12.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 13. Legal information provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 13.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions.
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 14. List of figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. JN5189-001-M10 & M13 block diagrams .......... 5 JN5189-001-M16 block diagram ....................... 5 JN5189-001-M10 & M13 ................................... 6 JN5189-001-M16 .............................................. 7 Critical Layout of die flag area..............
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 15. List of tables Table 1. Table 2. Table 3. Table 4. Modules references .......................................... 4 Schematic design-in check list ........................ 24 Layout design-in check list .............................. 27 Abbreviations ..................................................
JN-RM-2078 NXP Semiconductors JN5189, 89T, 88, 88T modules development reference manual 16. Contents 1. 1.1 1.2 1.3 2. 3. 4. 5. 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.10.1 5.10.2 Introduction ......................................................... 3 Audience ............................................................ 3 Manufacturer address ........................................ 3 Regulatory approvals ......................................... 3 Reference Design ..................................
